Implementing a strand of a scalable fault-tolerant quantum computing fabric

Abstract: Quantum error correction (QEC) is an essential step towards realising scalable quantum computers. Theoretically, it is possible to achieve arbitrarily long protection of quantum information from corruption due to decoherence or imperfect controls, so long as the error rate is below a threshold value. The two-dimensional surface code (SC) is a fault-tolerant error correction protocol} that has garnered considerable attention for actual physical implementations, due to relatively high error thresholds ~1%, and restriction to planar lattices with nearest-neighbour interactions. Here we show a necessary element for SC error correction: high-fidelity parity detection of two code qubits via measurement of a third syndrome qubit. The experiment is performed on a sub-section of the SC lattice with three superconducting transmon qubits, in which two independent outer code qubits are joined to a central syndrome qubit via two linking bus resonators. With all-microwave high-fidelity single- and two-qubit nearest-neighbour entangling gates, we demonstrate entanglement distributed across the entire sub-section by generating a three-qubit Greenberger-Horne-Zeilinger (GHZ) state with fidelity ~94%. Then, via high-fidelity measurement of the syndrome qubit, we deterministically entangle the otherwise un-coupled outer code qubits, in either an even or odd parity Bell state, conditioned on the syndrome state. Finally, to fully characterize this parity readout, we develop a new measurement tomography protocol to obtain a fidelity metric (90% and 91%). Our results reveal a straightforward path for expanding superconducting circuits towards larger networks for the SC and eventually a primitive logical qubit implementation.

• The paper demonstrates high-fidelity parity detection between code qubits, achieving fidelities of 90-91% for Bell states and 94% for a three-qubit GHZ state.
• It employs a two-dimensional surface code architecture using superconducting transmon qubits with microwave resonators that enable nearest-neighbor interactions.
• Robust pulse calibration and measurement tomography validate the control methods, advancing scalable error correction in fault-tolerant quantum computing.

Implementing a Strand of a Scalable Fault-Tolerant Quantum Computing Fabric

The transition from theoretical groundwork to practical realization of fault-tolerant quantum computing is a critical research area that this paper addresses through the implementation of a strand in a scalable fault-tolerant quantum computing fabric. In focusing on Quantum Error Correction (QEC), the authors present experimental results demonstrating a component necessary for the two-dimensional surface code (SC) architecture. This SC architecture offers significant advantages due to its fault-tolerant error correction capabilities and planar lattice configuration, which facilitates nearest-neighbor interactions.

Key Contributions and Experimentation

The paper's primary contribution lies in demonstrating high-fidelity parity detection between code qubits, employing a syndrome qubit for measurement. Utilizing three superconducting transmon qubits, the research navigates the construction challenges of the SC, which involves linking two independent code qubits to a central syndrome qubit using microwave resonators. These resonators effectively act as quantum buses, facilitating interactions necessary for SC implementation.

In their experimental setup, the authors report a three-qubit GHZ state fidelity of approximately 94%. The parity detection process covers both even and odd parity Bell states with estimated fidelities of 91% and 90%, respectively. Measurement tomography is employed to characterize the fidelity of the parity readout protocol, achieving these high metrics, which are vital for ensuring accurate error detection in the surface code.

Technical Implementation and Performance

The authors' work explores the intricacies of the half-plaquette device, embodying a skew-symmetric layout with each qubit connecting to two bus resonators. This architecture overrides the more cumbersome conventional planar lattice while offering feasible experimental realizability with existing superconducting qubit technology. The high-fidelity gates employed are calibrated in the cross-resonance scheme, enabling crucial two-qubit nearest-neighbor interactions necessary for successful parity checks.

Given the critical nature of these gates, the paper also provides detailed insights into the pulse calibration processes, establishing the robustness of the experimental control methods employed. Furthermore, the authors convincingly show that the two-qubit interactions and measurements can be executed without introducing significant Hamiltonian corrections—a key advancement towards practical quantum computing architectures.

Implications and Future Work

The implications of this research are profound for QEC and the broader field of quantum computing. By demonstrating a method to achieve high-fidelity error correction components in a superconducting qubit system, the authors highlight a path toward realizing scalable quantum architectures. The successful implementation and testing of the parity detection herald a promising direction for achieving primitive logical qubits employing the SC approach.

Looking forward, the scaling of this experiment could lead to complete demonstrations of logical qubits embedded in larger networks, integrating multiple qubits with increased complexity. Such advancements could ultimately bridge the current divide between theoretical quantum error correction protocols and practical, deployable quantum computing systems. The research suggests that continued progress in superconducting qubit coherence and fidelity will be pivotal in overcoming challenges related to circuit integration as these systems scale in complexity.

In conclusion, the paper significantly advances the field of scalable quantum computing by harnessing existing superconducting quantum circuit technology to demonstrate an actionable step towards fault-tolerant quantum architectures. This research will undoubtedly inspire future investigations aimed at integrating larger qubit arrays for robust quantum error correction implementations.