Hysteresis in the transfer characteristics of MoS2 transistors

Abstract: We investigate the origin of the hysteresis observed in the transfer characteristics of back-gated field-effect transistors with an exfoliated MoS2 channel. We find that the hysteresis is strongly enhanced by increasing either gate voltage, pressure, temperature or light intensity. Our measurements reveal a step-like behavior of the hysteresis around room temperature, which we explain as water-facilitated charge trapping at the MoS2/SiO2 interface. We conclude that intrinsic defects in MoS2, such as S vacancies, which result in effective positive charge trapping, play an important role, besides H2O and O2 adsorbates on the unpassivated device surface. We show that the bistability associated to the hysteresis can be exploited in memory devices.

• The paper demonstrates that charge trapping from intrinsic defects and external adsorbates substantially enhances hysteresis in MoS₂ FETs.
• The study employs back-gated, exfoliated MoS₂ transistors on SiO₂/Si substrates to reveal n-type behavior linked to sulfur vacancies via gate voltage sweeps.
• Findings show that modulating pressure, temperature, and light exposure can control hysteresis, suggesting potential applications in memory storage devices.

Analysis of Hysteresis in MoS₂-based Transistors

The paper "Hysteresis in the transfer characteristics of MoS₂ transistors" presents an in-depth investigation into the phenomenon of hysteresis in MoS₂-based field-effect transistors (FETs). The research primarily focuses on the enhancement of hysteresis via external conditions such as gate voltage, pressure, temperature, and light intensity.

The study comprehensively explores the underlying mechanisms of hysteresis in MoS₂ transistors, attributing a significant role to charge trapping facilitated by the intrinsic defects in MoS₂, such as sulfur vacancies, and by external adsorbates like H₂O and O₂ molecules. These factors contribute to effective positive charge trapping, which manifests as hysteresis in the transfer characteristics of the transistor.

Experimental Methodology

The authors utilized back-gated, exfoliated MoS₂ transistors fabricated on SiO₂/Si substrates to carry out the investigations. The devices were subjected to various characterizations to probe the influence of gate voltage sweeps both in positive and negative directions. Ohmic contact was confirmed through I-V characteristics, and the transfer characteristics revealed n-type behavior attributable to native n-doping, primarily from sulfur vacancies in the MoS₂ channel.

Key Findings

1. Gate Voltage Influence: The hysteresis was strongly enhanced by wider gate voltage sweeps, indicating charge storage under electric stress.
2. Environmental Conditions: Changes in pressure and temperature had pronounced effects on hysteresis. Reduced pressure mitigates hysteresis, likely due to the partial removal of adsorbate residues, while increased temperature intensifies hysteresis, possibly due to enhanced charge carrier dynamics.
3. Light Exposure: Illumination amplified hysteresis, suggesting an interplay between photo-generated carriers and charge trapping dynamics.
4. Charge Trapping: The analysis deduced that trapped charge densities are significant, predominantly influenced by donor-like sulfur vacancies acting as positive charge traps. The density of trapped charges was estimated using hysteresis width metrics.
5. Theoretical Implications: The research further theorizes that water molecules at the MoS₂/SiO₂ interface may facilitate charge transfer processes via polarization effects, reinforcing the charge trapping/detrapping hypothesis.
6. Application Potential: The bistability offered by hysteresis in MoS₂ FETs holds potential utility in memory storage applications, demonstrating switching behaviors dependent on electrical bias conditions.

Broader Implications

This work provides valuable insights into the complex interplay of internal defects and external stimuli in shaping the electronic properties of 2D material-based transistors. The findings have significant implications for the development of reliable MoS₂-based electronic components. Moreover, the enhanced understanding of hysteresis mechanisms opens potential avenues for optimizing these devices for memory applications or light-sensing technologies.

Future Prospects

The exploration of hysteresis mechanisms under varied external stimuli sets the groundwork for future research aimed at minimizing unwanted hysteresis while leveraging beneficial properties for specialized applications. Further investigations could focus on defect engineering and advanced passivation techniques to improve the operational stability of MoS₂ transistors. Additionally, expanding this research to other transition metal dichalcogenides may uncover broader trends and augment material engineering strategies tailored to specific electronic applications.

The paper meticulously dissects the bilayer complexities contributing to hysteresis, marking a substantive contribution to the knowledge pool of semiconductor device physics and 2D materials engineering.