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Degrees of Freedom of Interference Networks with Transmitter-Side Caches

Published 16 Dec 2017 in cs.IT and math.IT | (1712.05957v1)

Abstract: This paper studies cache-aided interference networks with arbitrary number of transmitters and receivers, whereby each transmitter has a cache memory of finite size. Each transmitter fills its cache memory from a content library of files in the placement phase. In the subsequent delivery phase, each receiver requests one of the library files, and the transmitters are responsible for delivering the requested files from their caches to the receivers. The objective is to design schemes for the placement and delivery phases to maximize the sum degrees of freedom (sum-DoF) which expresses the capacity of the interference network at the high signal-to-noise ratio regime. Our work mainly focuses on a commonly used uncoded placement strategy. We provide an information-theoretic bound on the sum-DoF for this placement strategy. We demonstrate by an example that the derived bound is tighter than the bounds existing in the literature for small cache sizes. We propose a novel delivery scheme with a higher achievable sum-DoF than those previously given in the literature. The results reveal that the reciprocal of sum-DoF decreases linearly as the transmitter cache size increases. Therefore, increasing cache sizes at transmitters translates to increasing the sum-DoF and, hence, the capacity of the interference networks.

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