Level-1 Track Finding with an all-FPGA System at CMS for the HL-LHC

Abstract: The Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC) is designed to study a wide range of high energy physics phenomena. It employs a large all-silicon tracker within a 3.8 T magnetic solenoid, which allows precise measurements of transverse momentum ($p_\mathrm{T}$) and vertex position. This tracking detector will be upgraded to coincide with the operation of the High-Luminosity LHC, which will provide luminosities of up to $7.5\,\times\,10^{35}\,\mathrm{cm^{-2}s^{-1}}$ to CMS, or 200 collisions per 25 ns bunch crossing. This new tracker must maintain the nominal physics performance in this more challenging environment. Novel tracking modules that utilise closely spaced silicon sensors to discriminate on charged particle $p_\mathrm{T}$ have been developed and allow the selective readout of hits compatible with tracks of $p_\mathrm{T}\,>\,2-3$ GeV to off-detector trigger electronics. This would allow the use of tracking information at the Level-1 trigger of the experiment, a requirement to keep the Level-1 triggering rate below the 750 kHz target, while maintaining physics sensitivity. This paper presents a concept for an all-FPGA based track finder using a fully time-multiplexed architecture. Hardware demonstrators have been assembled to prove the feasibility and capability of such a system. The performance for a variety of physics scenarios will be presented, as well as the proposed scaling of the demonstrators to the final system.