Reliability Analysis of Component Level Redundant Topologies for solid state Fault Current Limiter

Abstract: Experience shows that semiconductor switches in power electronics systems are the most vulnerable components. One of the most common ways to solve this reliability challenge is component-level redundant design. There are four possible configurations for the redundant design in component-level. This paper presents a comparative reliability analysis between different component-level redundant designs for solid state fault current limiter (SSFCL). The aim of the proposed analysis is to determine the more reliable component-level redundant configuration. The mean time to failure (MTTF) is used as the reliability parameter. Considering both fault types (open circuit and short circuit), the MTTFs of different configurations are calculated. It is demonstrated that more reliable configuration depends on the junction temperature of the semiconductor switches in the steady state. That junction temperature is a function of i) ambient temperature, ii) power loss of the semiconductor switch and iii) thermal resistance of heat sink. Also, results sensitivity to each parameter is investigated. The results show that in different conditions, various configurations have higher reliability. The experimental results are presented to clarify the theory and feasibility of the proposed approaches. At last, levelized costs of different configurations are analyzed for a fair comparison.