Synchronous Chip-to-Chip Communication with a Multi-Chip Resonator Clock Distribution Network

Abstract: Superconducting digital circuits are a promising approach to build packaged-level integrated systems with high energy-efficiency and computational density. In such systems, performance of the data link between chips mounted on a multi-chip module (MCM) is a critical driver of performance. In this work we report a synchronous data link using Reciprocal Quantum Logic (RQL) enabled by resonant clock distribution on the chip and on the MCM carrier. The simple physical link has only four Josephson junctions and 3 fJ/bit dissipation, including a 300 W/W cooling overhead. The driver produces a signal with 35\,GHz analog bandwidth and connects to a single-ended receiver via 20 $\Omega$ Nb Passive Transmission Line (PTL). To validate this link, we have designed, fabricated and tested two 32$\times$32 mm$^2$ MCMs with eight 5$\times$5 mm$^2$ chips connected serially and powered with a meander clock, and with four 10$\times$10 mm$^2$ chips powered with a 2 GHz resonant clock. The meander clock MCM validates performance of the data link components, and achieved 5.4 dB AC bias margin with no degradation relative to individual chip test. The resonator MCM validates synchronization between chips, with a measured AC bias margin up to 4.8 dB between two chips. The resonator MCM is capable of powering circuits of 4 million Josephson junctions across the four chips with a projected 10 Gbps serial data rate.