HashMem: PIM-based Hashmap Accelerator
Abstract: Hashmaps are widely utilized data structures in many applications to perform a probe on key-value pairs. However, their performance tends to degrade with the increase in the dataset size, which leads to expensive off-chip memory accesses to perform bucket traversals associated with hash collision. In this work, we propose HashMem, a processing-in-memory (PIM) architecture designed to perform bucket traversals along the row buffers at the subarray level. Due to the inherent parallelism achieved with many concurrent subarray accesses and the massive bandwidth available within DRAM, the execution time related to bucket traversals is significantly reduced. We have evaluated two versions of HashMem, performance-optimized and area-optimized, which have a speedup of 49.1x/17.1x and 9.2x/3.2x over standard C++ map and hyper-optimized hopscotch map implementations, respectively.
- T. Goetghebuer-Planchon. (2015, Mar.) A c++ implementation of a fast hash map and hash set using hopscotch hashing. [Online]. Available: https://github.com/Tessil/hopscotch-map
- M. Herlihy, N. Shavit, and M. Tzafrir, “Hopscotch hashing,” in Proceedings of the 22nd International Symposium on Distributed Computing, ser. DISC ’08. Berlin, Heidelberg: Springer-Verlag, 2008, p. 350–364. [Online]. Available: https://doi.org/10.1007/978-3-540-87779-0_24
- L. Ke, X. Zhang, J. So, J.-G. Lee, S.-H. Kang, S. Lee, S. Han, Y. Cho, J. H. Kim, Y. Kwon, K. Kim, J. Jung, I. Yun, S. J. Park, H. Park, J. Song, J. Cho, K. Sohn, N. S. Kim, and H.-H. S. Lee, “Near-memory processing in action: Accelerating personalized recommendation with axdimm,” IEEE Micro, vol. 42, no. 1, pp. 116–127, 2022.
- D. Lee, Y. Kim, V. Seshadri, J. Liu, L. Subramanian, and O. Mutlu, “Tiered-latency dram: A low latency and low cost dram architecture,” in 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA), 2013, pp. 615–626.
- D. Levinthal. Performance analysis guide for intel core i7 processor and intel xeon 5500 processors. [Online]. Available: https://www.intel.com/content/dam/develop/external/us/en/documents/performance-analysis-guide-181827.pdf
- S. Li, Z. Yang, D. Reddy, A. Srivastava, and B. Jacob, “Dramsim3: A cycle-accurate, thermal-capable dram simulator,” IEEE Comput. Archit. Lett., vol. 19, no. 2, p. 106–109, jul 2020. [Online]. Available: https://doi.org/10.1109/LCA.2020.2973991
- Y. Lu, B. Prabhakar, and F. Bonomi, “Perfect hashing for network applications,” in 2006 IEEE International Symposium on Information Theory, 2006, pp. 2774–2778.
- O. Mutlu, S. Ghose, J. Gómez-Luna, and R. Ausavarungnirun, “A modern primer on processing in memory,” 2022.
- Sparse-Hash. (2020) sparse-haspmap. [Online]. Available: https://github.com/sparsehash/sparsehash
- A. Stillmaker, Z. Xiao, and B. M. Baas, “Toward more accurate scaling estimates of CMOS circuits from 180 nm to 22 nm,” Univ. of California-Davis Tech. Report ECE-VCL-2011-4, 2012.
- Wikipedia. Open-addressing. [Online]. Available: https://en.wikipedia.org/wiki/Open_addressing
- Wikipedia. (2015, Mar.) Hopscotch hashing is a scheme in computer programming for resolving hash collisions. [Online]. Available: https://en.wikipedia.org/wiki/Hopscotch_hashing
- Y. Yuan, M. Alian, Y. Wang, R. Wang, I. Kurakin, C. Tai, and N. S. Kim, “Don’t forget the i/o when allocating your llc,” in 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA), 2021, pp. 112–125.
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