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Generalized Staircase Codes with Arbitrary Bit Degree
Published 24 Oct 2023 in cs.IT and math.IT | (2310.16165v2)
Abstract: We introduce a natural generalization of staircase codes in which each bit is protected by arbitrarily many component codewords rather than two. This enables powerful energy-efficient FEC based on iterative decoding of Hamming components.
- B. P. Smith, A. Farhood, A. Hunt, F. R. Kschischang, and J. Lodge, “Staircase codes: FEC for 100 Gb/s OTN,” J. Lightw.Technol. 30, 110–117 (2012).
- A. Y. Sukmadji, U. Martínez-Peñas, and F. R. Kschischang, “Zipper codes,” J. Lightw.Technol. 40, 6397–6407 (2022).
- C. Fougstedt and P. Larsson-Edefors, “Energy-efficient high-throughput VLSI architectures for product-like codes,” J. Lightw.Technol. 37, 477–485 (2019).
- W. Liu, J. Rho, and W. Sung, “Low-power high-throughput BCH error correction VLSI design for multi-level cell NAND flash memories,” in IEEE Workshop Signal Process. Syst. Des. and Implementation, (2006), pp. 303–308.
- A. Y. Sukmadji, F. R. Kschischang, and M. Shehadeh, “Generalized spatially-coupled product-like codes using zipper codes with irregular degree,” https://arxiv.org/abs/2310.13825. To appear in GLOBECOM 2023 Workshop on Channel Coding Beyond 5G.
- M. Barakatain, Y. Hashemi, B. Karimi, H. Ebrahimzad, and C. Li, “Low-complexity zipper-LDPC and low-latency zipper-BCH concatenated codes,” J. Lightw.Technol. (2023).
- J. Robinson and A. Bernstein, “A class of binary recurrent codes with limited error propagation,” IEEE Trans. Inf.Theory 13, 106–113 (1967).
- S. J. Johnson and S. R. Weller, “Codes for iterative decoding from partial geometries,” IEEE Trans.Commun. 52, 236–243 (2004).
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