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Memory Sharing with CXL: Hardware and Software Design Approaches
Published 4 Apr 2024 in cs.ET and cs.OS | (2404.03245v1)
Abstract: Compute Express Link (CXL) is a rapidly emerging coherent interconnect standard that provides opportunities for memory pooling and sharing. Memory sharing is a well-established software feature that improves memory utilization by avoiding unnecessary data movement. In this paper, we discuss multiple approaches to enable memory sharing with different generations of CXL protocol (i.e., CXL 2.0 and CXL 3.0) considering the challenges with each of the architectures from the device hardware and software viewpoint.
- Compute Express Link (CXL). https://www.computeexpresslink.org/.
- OpenSHMEM Specification. https://openshmem.org/site/specification.
- H. Al Maruf and M. Chowdhury. Memory disaggregation: Advances and open challenges. ACM SIGOPS OSR, 2023.
- Pond: CXL-Based Memory Pooling Systems for Cloud Platforms. In ASPLOS, 2023.
- TPP: Transparent page placement for CXL-enabled tiered-memory. In ASPLOS, 2023.
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