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Practical Modulo Sampling: Mitigating High-Frequency Components

Published 20 Jan 2025 in eess.SP | (2501.11330v1)

Abstract: Recovering signals within limited dynamic range (DR) constraints remains a central challenge for analog-to-digital converters (ADCs). To prevent data loss, an ADCs DR typically must exceed that of the input signal. Modulo sampling has recently gained attention as a promising approach for addressing DR limitations across various signal classes. However, existing methods often rely on ideal ADCs capable of capturing the high frequencies introduced by the modulo operator, which is impractical in real-world hardware applications. This paper introduces an innovative hardware-based sampling approach that addresses these high-frequency components using an analog mixer followed by a Low-Pass Filter (LPF). This allows the use of realistic ADCs, which do not need to handle frequencies beyond the intended sampling rate. Our method eliminates the requirement for high-specification ADCs and demonstrates that the resulting samples are equivalent to those from an ideal high-spec ADC. Consequently, any existing modulo recovery algorithm can be applied effectively. We present a practical hardware prototype of this approach, validated through both simulations and hardware recovery experiments. Using a recovery method designed to handle quantization noise, we show that our approach effectively manages high-frequency artifacts, enabling reliable modulo recovery with realistic ADCs. These findings confirm that our hardware solution not only outperforms conventional methods in high-precision settings but also demonstrates significant real-world applicability.

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