CoverAssert: Iterative LLM Assertion Generation Driven by Functional Coverage via Syntax-Semantic Representations

Abstract: LLMs can generate SystemVerilog assertions (SVAs) from natural language specs, but single-pass outputs often lack functional coverage due to limited IC design understanding. We propose CoverAssert, an iterative framework that clusters semantic and AST-based structural features of assertions, maps them to specifications, and uses functional coverage feedback to guide LLMs in prioritizing uncovered points. Experiments on four open-source designs show that integrating CoverAssert with AssertLLM and Spec2Assertion improves average improvements of 9.57 % in branch coverage, 9.64 % in statement coverage, and 15.69 % in toggle coverage.

• The paper introduces CoverAssert, an iterative assertion generation framework that fuses syntax and semantic features to improve functional coverage in IC verification.
• The methodology employs a modular pipeline combining structural signal feature extraction with semantic embeddings to refine LLM-generated assertions.
• Experimental results demonstrate significant gains in branch, statement, and toggle coverage metrics across diverse RTL designs using iterative feedback loops.

CoverAssert: Syntax–Semantic Iterative Assertion Generation for Enhanced Functional Coverage

Introduction

The paper "CoverAssert: Iterative LLM Assertion Generation Driven by Functional Coverage via Syntax-Semantic Representations" (2604.06607) addresses persistent limitations in LLM-driven assertion-based verification (ABV) of integrated circuit (IC) designs. ABV, a recognized methodology for improving design visibility and reducing functional debugging effort, has increasingly relied on LLMs to synthesize SystemVerilog assertions (SVAs) from natural language specifications. However, existing approaches suffer from inadequate mapping between specifications and design functionality, resulting in incomplete coverage and missed corner-case behaviors due to the lexical and semantic similarities prevalent in assertion codebases.

The CoverAssert framework is introduced as a solution to bridge the coverage gap by employing a synergy of syntactic structural and semantic feature fusion to guide iterative, feedback-driven refinement of LLM-generated assertions. This approach directly integrates coverage information and explicitly prioritizes specification functional points lacking verification.

Figure 1: The CoverAssert framework enhances assertion generation by accurately identifying uncovered functional descriptions and prioritizing their verification, thereby improving overall coverage.

Methodology: Syntax–Semantic Feedback-Controlled Assertion Generation

CoverAssert is architected as a modular, iterative feedback control system that augments existing SVA generation pipelines. The pipeline is characterized by the following primary modules:

1. Semantic Feature Extraction: Specification and assertion intents are abstracted via LLMs and embedded with state-of-the-art models (i.e., Qwen3-Embedding), yielding high-dimensional vectors for distinguishing functional meanings beyond textual resemblance.
2. Signal Structural Feature Extraction: System signals are parsed within assertion and design abstract syntax trees (ASTs). For each assertion, signal paths and pairwise longest common ancestor (LCA) distances are encoded into position-aware, padded vectors to represent connectivity and hierarchy information.
3. Syntax–Semantic Clustering: Assertions are first filtered based on AST-derived distance metrics, then clustered via semantic embeddings. Principal component analysis (PCA) compacts structural representations, and clusters are fused as one-hot vectors, generating groups of functionally and structurally consistent assertions.
4. Specification Decomposition and Functional Point Extraction: The specification is split into modular Sub-SPECs using LLMs. Within each, atomic validation points—function-level requirements—are further extracted, enabling granular feedback on functional coverage gaps.
5. Assertion-to-Specification Mapping: Each assertion group is matched with the most relevant Sub-SPEC. Fine-grained matches are established to specific functional points using both signal correspondence and semantic alignment, thereby distinguishing covered versus uncovered specification requirements.
6. Coverage-Driven Feedback Loop: Identified specification and functional points with deficient coverage are iteratively supplied as constraints for the next round of LLM assertion generation. The process repeats until a defined coverage threshold (e.g., $\theta=0.85$) across all Sub-SPECs is achieved.

   Figure 2: The CoverAssert framework is designed for compatibility and seamless integration with current assertion generation techniques.

The lightweight, model-agnostic feedback protocol of CoverAssert makes it directly compatible with various LLM-based assertion generation strategies, requiring no retraining or architectural modifications to the underlying generative models.

Experimental Evaluation

The empirical evaluation leverages four open-source RTL designs (I$^2$C, SHA3, ECG, and Pairing) covering diverse domains and complexity, with assertion correctness validated by Cadence JasperGold formal verification. CoverAssert was integrated with two benchmark assertion generation pipelines: AssertLLM (Fang et al., 2024) and Spec2Assertion (Wu et al., 12 May 2025). Three key functional coverage metrics were evaluated: branch functional coverage (BFC), statement functional coverage (SFC), and toggle functional coverage (TFC), assessed within each assertion's cone of influence.

The major results are:

• When applied to AssertLLM, CoverAssert increased BFC by 6.56%, SFC by 6.76%, and TFC by 13.71% on average after two feedback iterations.
• On Spec2Assertion, integration with CoverAssert led to average coverage gains of 1.86% (BFC), 2.6% (SFC), and 10.2% (TFC) after two iterations.
• Coverage improvements are cumulative, with the first iteration yielding the most pronounced gains, and the second confirming further incremental enhancements.
• Assertion syntactic and property correctness remained robust, with a substantial increase in assertions passing formal property verification after feedback.

These results validate the central claim: incorporating targeted feedback based on syntax–semantic mapping and functional coverage closes existing gaps left by single-pass LLM generations, resulting in more exhaustive and reliable design verification.

Implications and Future Directions

CoverAssert constitutes a significant methodological advancement in SVA automation by embedding coverage-awareness and specification-driven prioritization directly into the assertion synthesis loop. Practically, this translates to more comprehensive and predictable design verification outcomes, better calibration of formal verification effort, and faster convergence to coverage targets for complex IC designs.

Theoretically, this work demonstrates the utility of combining hierarchical, structural program representations (via AST parsing and signal path encoding) with deep semantic embeddings for the grounding and alignment of generated assertions to their intended specification functions.

This approach opens several avenues for further development:

• Integration with reinforcement learning or active learning frameworks, leveraging formal verification counterexamples for guided correction.
• Expansion to property generation beyond SVAs, encompassing liveness and temporal properties, or compositional property sets.
• Adaptation to more expressive or domain-adapted embedding spaces, potentially utilizing fine-tuned LLMs or transformers with hardware-domain specialization.
• Exploration of plug-in modules for EDA toolchains, enabling in-situ, real-time assertion feedback and synthesis in industrial IC design flows.

Conclusion

CoverAssert introduces an iterative, feedback-driven mechanism for integrating functional coverage information into LLM-based assertion generation. By employing a novel fusion of signal structural paths and semantic embeddings, CoverAssert identifies and remedies coverage blind spots, demonstrably improving key coverage metrics across diverse design benchmarks and assertion generation backends. The modularity and compatibility of the framework recommend its adoption in both academic and industrial settings aiming for verifiably complete specification coverage in ABV workflows.