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Always-On CZ Gate in Quantum Systems

Updated 9 November 2025
  • Always-on CZ gate is a two-qubit entangling operation that leverages permanent ZZ interactions to impart a controlled π phase shift on the |11⟩ state.
  • It employs pulse shaping and precise timing protocols to achieve high on/off contrast and minimal crosstalk across superconducting, semiconductor, and spin qubit platforms.
  • Robust control techniques and architectural strategies, such as opposite-anharmonicity pairing and AEON sweet spots, yield gate fidelities exceeding 99.9% for scalable quantum computing.

An always-on CZ (controlled-Z) gate is a two-qubit entangling operation physically realized by harnessing the ever-present, “always-on” ZZZZ-type interaction in quantum hardware. Rather than employing tunable couplers to modulate the ZZZZ interaction, always-on CZ gates exploit this residual coupling directly, often combining it with pulse shaping or timing protocols to achieve high on/off contrast, minimal crosstalk, and robustness to device noise. This approach figures prominently in superconducting, semiconductor spin, and exchange-only qubit platforms, with scalable protocols demonstrated for systems lacking dynamic isolation between qubits.

1. Physical Origin and Theoretical Framework

Always-on CZ gates are founded on the presence of a static two-qubit ZZZZ interaction or its analog, which can be generically described by the effective Hamiltonian

HeffJZZσz(1)σz(2)+(singlequbitterms).H_{\mathrm{eff}} \simeq J_{ZZ} \, \sigma_z^{(1)}\sigma_z^{(2)} + (\mathrm{single-qubit\,terms})\,.

Here, JZZJ_{ZZ} is the ZZZZ-coupling strength (units of frequency), and σz(i)\sigma_z^{(i)} acts on qubit ii. This coupling arises in multiple architectures:

Allowing the system to evolve for a precise duration ZZZZ1 imparts the conditional ZZZZ2 phase on ZZZZ3, enacting the CZ gate: ZZZZ4 with ZZZZ5. These identities are exact when single-qubit terms are compensated or tracked in software.

2. Realizations in Superconducting Qubits

AB-Type Opposite-Anharmonicity Architectures

An advanced scheme uses pairs of superconducting qubits with opposite-sign anharmonicities—transmon (ZZZZ6) and C-shunt flux qubit (ZZZZ7)—coupled via a fixed capacitive link (Zhao et al., 2020). Key elements:

  • Hamiltonian engineering: The ZZZZ8 interaction can be controlled or nulled by tuning the detuning ZZZZ9 to satisfy ZZZZ0 (the “zero-ZZ” point), exploiting cancellation of second-order virtual processes between ZZZZ1 and ZZZZ2.
  • High on/off ratio: At the off point, residual ZZZZ3 kHz, while at the on point, ZZZZ4 (e.g., ZZZZ5 MHz for ZZZZ6 MHz), yielding an on/off contrast ZZZZ7.
  • CZ protocol: Keep qubit ZZZZ8 at its parking frequency; pulse ZZZZ9 to the interaction frequency to enable maximal HeffJZZσz(1)σz(2)+(singlequbitterms).H_{\mathrm{eff}} \simeq J_{ZZ} \, \sigma_z^{(1)}\sigma_z^{(2)} + (\mathrm{single-qubit\,terms})\,.0; hold for a time to produce a HeffJZZσz(1)σz(2)+(singlequbitterms).H_{\mathrm{eff}} \simeq J_{ZZ} \, \sigma_z^{(1)}\sigma_z^{(2)} + (\mathrm{single-qubit\,terms})\,.1-phase on HeffJZZσz(1)σz(2)+(singlequbitterms).H_{\mathrm{eff}} \simeq J_{ZZ} \, \sigma_z^{(1)}\sigma_z^{(2)} + (\mathrm{single-qubit\,terms})\,.2; return to parking point.
  • Performance: Leakage and SWAP errors HeffJZZσz(1)σz(2)+(singlequbitterms).H_{\mathrm{eff}} \simeq J_{ZZ} \, \sigma_z^{(1)}\sigma_z^{(2)} + (\mathrm{single-qubit\,terms})\,.3 for symmetric devices, HeffJZZσz(1)σz(2)+(singlequbitterms).H_{\mathrm{eff}} \simeq J_{ZZ} \, \sigma_z^{(1)}\sigma_z^{(2)} + (\mathrm{single-qubit\,terms})\,.4; typical fabrication variation still results in HeffJZZσz(1)σz(2)+(singlequbitterms).H_{\mathrm{eff}} \simeq J_{ZZ} \, \sigma_z^{(1)}\sigma_z^{(2)} + (\mathrm{single-qubit\,terms})\,.5.
  • Crosstalk suppression and scaling: Lattices of alternating A–B qubits can be tiled so all AB links operate at the zero-ZZ idle point, suppressing static crosstalk below HeffJZZσz(1)σz(2)+(singlequbitterms).H_{\mathrm{eff}} \simeq J_{ZZ} \, \sigma_z^{(1)}\sigma_z^{(2)} + (\mathrm{single-qubit\,terms})\,.6 kHz, with parallel CZ operations achievable by pulsing only the targeted A qubits.

Always-On Capacitive Coupling in Transmons

In capacitively coupled transmon systems, a strong residual HeffJZZσz(1)σz(2)+(singlequbitterms).H_{\mathrm{eff}} \simeq J_{ZZ} \, \sigma_z^{(1)}\sigma_z^{(2)} + (\mathrm{single-qubit\,terms})\,.7 interaction (HeffJZZσz(1)σz(2)+(singlequbitterms).H_{\mathrm{eff}} \simeq J_{ZZ} \, \sigma_z^{(1)}\sigma_z^{(2)} + (\mathrm{single-qubit\,terms})\,.8 MHz) is exploited without dynamic coupling control (Long et al., 2021).

  • CZ by free evolution: Letting the system evolve under HeffJZZσz(1)σz(2)+(singlequbitterms).H_{\mathrm{eff}} \simeq J_{ZZ} \, \sigma_z^{(1)}\sigma_z^{(2)} + (\mathrm{single-qubit\,terms})\,.9 for time JZZJ_{ZZ}0 realizes the ideal CZ gate. For the cited parameters, JZZJ_{ZZ}1 ns.
  • Calibration: The exact phase accumulation is verified by process tomography or conditional Ramsey-type measurements; single-qubit JZZJ_{ZZ}2 rotations are adjusted to remove systematic phase errors.
  • Achieved fidelity: Quantum process tomography yields JZZJ_{ZZ}3; master-equation simulations indicate that decoherence (TJZZJ_{ZZ}4, TJZZJ_{ZZ}5) and coherent leakage are the main limitations.
  • Scalability: This CZ primitive fits naturally into architectures where tunable couplers are difficult to implement; the same mechanism can underpin single- and two-qubit gates with the always-on ZZ.

3. Spin Qubits and Exchange-Locked Architectures

Silicon Double Quantum Dots and Pulse-Shaping for Robustness

Always-on JZZJ_{ZZ}6 in silicon quantum dots induces unwanted mixing, particularly when Zeeman splittings are nearly resonant. Nonetheless, robust CZ can be implemented (Güngördü et al., 2019):

  • Hamiltonian reduction: The full (1,1) electron manifold is block-diagonalized. The effective interaction is JZZJ_{ZZ}7 plus single-qubit corrections.
  • Smooth pulse shaping: A single, band-limited envelope JZZJ_{ZZ}8 (on one qubit) is synthesized using a “generating function” formalism (Barnes et al.), solving for JZZJ_{ZZ}9 such that the composite evolution yields a robust CZ up to local ZZZZ0 terms and is first-order insensitive to both exchange noise ZZZZ1 and crosstalk.
  • Pulse design: The envelope is parametrized as a function of a phase ZZZZ2, with nontrivial constraints enforcing the elimination of first-order Magnus errors. Additional virtual ZZZZ3 gates compensate Bloch–Siegert shifts arising beyond the RWA.
  • Fidelity: Numerical simulations give worst-case infidelity ZZZZ4 for ZZZZ5 and realistic charge/qubit fluctuations.
  • Crosstalk suppression: The pulse shaping protocol also cancels leading-order ZZZZ6 crosstalk—critical for multi-qubit arrays.

Chain Architectures and Two-Tone Robust Pulses

In three-spin chains (e.g., qubits 1–2–3), always-on exchange yields simultaneous ZZZZ7 interactions on adjacent pairs (Kanaar et al., 2021).

  • Single-tone protocol: Driving only one edge qubit while choosing total pulse time ZZZZ8 ensures trivial identity evolution on unwanted pairs; the 1–2 pair acquires the CZ phase via the ZZZZ9 interaction.
  • Limitations: Single-tone pulses are not robust to realistic fluctuations: σz(i)\sigma_z^{(i)}0 amplitude error or σz(i)\sigma_z^{(i)}1 exchange variation degrade σz(i)\sigma_z^{(i)}2.
  • Two-tone shaped pulses: Driving both qubits with analytically constructed “noise-cancelling” pulses ensures first-order cancellation of errors in both exchange and amplitude. Numerical optimization yields robust CZ pulses (duration σz(i)\sigma_z^{(i)}3s at σz(i)\sigma_z^{(i)}4 MHz) retaining σz(i)\sigma_z^{(i)}5 even under σz(i)\sigma_z^{(i)}6 disorder.

AEON (Always-On, Exchange-Only) Qubits and Sweet Spots

Exchange-only logical qubits built from three spins in linear TQDs (AEON) enable always-on two-qubit gates while maintaining charge noise protection (Shim et al., 2016):

  • “Full sweet spot”: Each qubit and its coupling are operated at bias points where their respective energy splittings are first-order insensitive to detuning noise, specified by analytic conditions on the two relevant detuning parameters σz(i)\sigma_z^{(i)}7.
  • CZ implementation: An exchange σz(i)\sigma_z^{(i)}8 is pulsed on between two AEON qubits, projecting to an effective Ising coupling σz(i)\sigma_z^{(i)}9 (ii0). Evolving for ii1 achieves the controlled-Z up to local Z rotations.
  • Noise resilience: At the sweet spot, only second-order charge noise enters, and fidelities ii2 are achievable for gate durations ii3 hundreds of ns.

4. Robust Control and Error Suppression in Always-On Architectures

Advanced protocols exploit pulse-shaping techniques to refocus coupling or suppress crosstalk and noise in always-on systems (Hai et al., 17 Mar 2025):

  • Composite identity pulses: Each qubit is subjected to a shaped ii4 "robust identity" pulse during the ii5 wait. Pulses are designed (via Fourier synthesis) such that first-order error trajectories vanish for all ii6, ii7, and ii8 contributions, i.e., static ii9 noise and time-dependent 11|11\rangle0 crosstalk are suppressed.
  • CZ sequence: Both qubits execute simultaneous robust 11|11\rangle1 pulses for time 11|11\rangle2; evolution is solely under 11|11\rangle3, yielding the desired entangling phase. For 11|11\rangle4 MHz, 11|11\rangle5 ns.
  • Error budget: Simulations yield 11|11\rangle6 for 11|11\rangle7 and 11|11\rangle8s.
  • Scaling and mitigation of chaotic growth: The same pulse sequences may be applied globally in 1D or 2D arrays, effectively decoupling unintended pairs and halting otherwise rapid entanglement growth characteristic of untailored always-on couplings.

5. Comparative Summary of Implementations

Architecture 11|11\rangle9-on/off Ratio Typical JS1S2J\,\mathbf{S}_1\cdot\mathbf{S}_20 Scalability / Crosstalk Suppression
Supercond. AB (Opp. Anh.) JS1S2J\,\mathbf{S}_1\cdot\mathbf{S}_21 JS1S2J\,\mathbf{S}_1\cdot\mathbf{S}_22–99.999% 2D AB tiling; negligible spec. crosstalk
Cap. coupled transmons Not switchable JS1S2J\,\mathbf{S}_1\cdot\mathbf{S}_23% Suitable for fixed lattices
Si double dots Always-on JS1S2J\,\mathbf{S}_1\cdot\mathbf{S}_24% (robust) Pulse-shaped, local crosstalk suppression
3-spin AEON/chain Always-on JS1S2J\,\mathbf{S}_1\cdot\mathbf{S}_25% Full sweet spot; two-tone robust pulses
All-spin, robust pulses Not needed JS1S2J\,\mathbf{S}_1\cdot\mathbf{S}_26% Arbitrary lattice, dynamic crosstalk suppression

Always-on CZ gates obviate the need for high-contrast tunable couplers, enabling frequent, rapid entangling operations throughout an array. Robust-control protocols and architectural biases (e.g., opposite-anharmonicity pairing, AEON sweet spots) yield fidelities sufficient for fault-tolerant thresholds under realistic hardware constraints, with error rates set chiefly by device coherence, pulse calibration, and dynamical suppression of crosstalk.

6. Scalability, Spectator Errors, and System Integration

Efficient scaling of always-on CZ gates relies on the suppression of spurious JS1S2J\,\mathbf{S}_1\cdot\mathbf{S}_27 crosstalk and the ability to parallelize operations:

  • Superconducting AB tiling allows all AB links to be on at once in idle; when a CZ is needed, a targeted A qubit is pulsed, while others remain at the zero-ZZ point (Zhao et al., 2020).
  • Spin qubit chains/arrays use pulse timing (via identity operations) and pulse shaping to selectively accumulate CZ phases only on intended pairs, suppressing the rest (Hai et al., 17 Mar 2025, Kanaar et al., 2021).
  • Robust global sequences avoid chaotic entanglement or error propagation common in naive always-on settings; scalable protocols thus ensure that high-fidelity, low-crosstalk entanglement is sustainable in deep circuits and large systems.

A plausible implication is that always-on CZ gates, when combined with advanced robust-control pulse sequences, can match or even exceed the scalability and robustness of architectures built on dynamically switchable couplers, while retaining circuit simplicity and high-speed operation.

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