Circuit Discovery Pipelines

• Circuit discovery pipelines are algorithmic frameworks that identify minimal subgraphs from model computation graphs to faithfully reproduce target behaviors.
• They use modular workflows with stages such as specification, scoring, selection, and evaluation to ensure logical completeness and computational efficiency.
• Innovations like PEAP and multi-granular pruning extend these methods to diverse domains, addressing challenges in scalability, positional specificity, and task faithfulness.

Circuit discovery pipelines are algorithmic frameworks designed to automatically identify minimal subgraphs, or "circuits," within model computation graphs that are sufficient to explain target behaviors. These pipelines are foundational to mechanistic interpretability in deep learning, enabling systematic dissection of neural computations in transformers, vision models, analog integrated circuits, and quantum circuits. Advances in this area have addressed challenges of positional specificity, logical completeness, computational efficiency, privacy, and task faithfulness.

1. Core Principles of Circuit Discovery

At its core, circuit discovery seeks a sparse subgraph of computational nodes and edges such that the circuit alone implements a specified function, with minimal size and maximal faithfulness. The central requirements are:

• Faithfulness: The circuit alone should reproduce the target model behavior under ablation, e.g., hard faithfulness $F_H(C) = \mathbf{1}\{$circuit prediction = model prediction$\}$ or soft faithfulness $F_S(C) = M(C)/M(M)$.
• Minimality: No proper subcircuit achieves the same functional performance.
• Completeness: All mechanistically necessary components are included to avoid missed pathways.

Several complementary formal frameworks have been developed to capture these desiderata, including logic gate decompositions (AND, OR, ADDER), path-level stratifications, differentiable masking, and complexity-theoretic query hierarchies (Haklay et al., 7 Feb 2025, 2505.10039, Chen et al., 2024, Yu et al., 2024, Adolfi et al., 2024).

2. High-Level Workflow Components

Almost all modern pipelines share a modular structure, illustrated below:

Stage	Typical Algorithmic Elements
Specification	Task metric, input dataset, “concept” span or schema
Scoring	Attribution/patching, logic-gate inference, gradient/LRP
Selection	Greedy, ILP, differentiable masking, hierarchical pruning
Evaluation	Faithfulness/completeness metrics, ablation/patch validation
Postprocessing	Visualization, interpretation, circuit manipulation

Example: PEAP (Position-aware Edge Attribution Patching)

• Automates schema generation for cross-positional semantic spans using LLMs.
• Computes position-specific edge attributions without premature aggregation.
• Aggregates scores via dataset schemas, constructs circuits in the abstract schema-graph, and reprojects to the full model graph for evaluation (Haklay et al., 7 Feb 2025).

Example: Multi-Granular Pruning

• Jointly optimizes masks over blocks, heads, and individual neurons via a two-stream, sparsity-regularized KL objective in a single fine-tuning run, allowing node-level granularity at low memory cost (Haider et al., 11 Dec 2025).

3. Mathematical Formulations and Evaluation Metrics

Circuit discovery frameworks employ mathematical formulations that precisely quantify per-edge or per-node importance, circuit sufficiency, and completeness:

• Edge Attribution Patching (EAP): $g(e) \approx (z_u^* - z_u)^\top \nabla_{z_v} M(x)$ (Haklay et al., 7 Feb 2025).
• Layer-wise Relevance Propagation (RelP): Propagation coefficients $\rho_i$ redistribute scalar output metrics back through the network, improving signal-to-noise over raw gradients (Jafari et al., 28 Aug 2025).
• AND/OR/ADDER Decomposition: The minimal circuit for faithfulness must include all edges of each AND/ADDER gate and at least one per OR gate; completeness is dual (2505.10039).
• Optimization: Selection is performed via greedy, layerwise, or integer linear programming under cardinality or PNR constraints (Nikankin et al., 28 Oct 2025).
• Differentiable Masking (e.g., with hard-concrete or Gumbel-sigmoid relaxations) enables joint optimization of sparsity, faithfulness, and completeness in end-to-end fashion (Yu et al., 2024, Haider et al., 11 Dec 2025).

Evaluation metrics include hard/soft faithfulness, KL divergence, ablation-induced accuracy drop, circuit stability (Hamming distance under seeds), and edge/node/weight densities.

4. Concrete Methodological Innovations

Recent circuit discovery pipelines have introduced a range of algorithmic advancements:

• Position-Aware Circuit Analysis: PEAP extends edge attribution to handle position-specific edges via dataset schemas, yielding smaller, more faithful, position-specific circuits (Haklay et al., 7 Feb 2025).
• Logical Gate Frameworks: Explicit identification of AND/OR/ADDER gates, with dual noising/denoising interventions, ensures logical completeness and stability (2505.10039).
• Path-Level and Memory Circuit Analysis: Path-level pipelines isolate complete sequential computation chains (memory circuits) underpinning generic skills, restoring causal transitivity and enabling stratified and inclusive circuit graphs for behaviors like in-context learning (Chen et al., 2024).
• Efficient Computation: Per-Attention-Head Quantization (PAHQ) and RelP drastically reduce computational and memory requirements for circuit discovery while retaining high faithfulness (Wang et al., 27 Oct 2025, Jafari et al., 28 Aug 2025).
• Multi-Granular Masking: Simultaneous pruning at block, head, and neuron levels, performed in a single pass, reveals surplus neurons within “important” components and achieves >93% sparsity with negligible loss in task metric (Haider et al., 11 Dec 2025).
• Optimization Strategies: Bootstrapping for sign consistency, ratio-based edge selection, and ILP-based circuit construction provide robust trade-offs between retrieval of positive contributions and overall circuit-model fidelity (Nikankin et al., 28 Oct 2025).

5. Applications Beyond LLMs

Circuit discovery pipelines extend to domains including vision, analog design, and quantum circuits:

• Vision Models: Concept circuits are discovered using cross-layer attribution (CLA) and granular concept circuit (GCC) methods, either targeting neurons causally linked to visual concepts or automatically constructing fine-grained, semantically coherent subgraphs for each query (Rajaram et al., 2024, Kwon et al., 3 Aug 2025).
• Analog IC Topology Discovery: Generative models (AnalogFed, AnalogGenie) learn to propose valid, novel analog circuits in pin-level Eulerian-sequence representations, enabling data-driven analog design with federated learning and privacy-preserving aggregation (Li et al., 20 Jul 2025, Gao et al., 28 Feb 2025).
• Quantum Circuit Discovery: Evolutionary strategies discover quantum algorithmic circuits by optimizing multi-objective fitness (accuracy, gate count, depth) over variable-length genomes in specified gate libraries, producing Pareto-optimal, low-depth quantum circuits (Potoček et al., 2018).

6. Limits, Complexity, and Practical Considerations

Complexity-theoretic analyses reveal intrinsic intractability for many circuit discovery queries. Sufficient-circuit or ablation problems are NP- or even $\Sigma_2^p$-hard (e.g., global minimal hitting sets required to guarantee explanation or prediction control), precluding exact search at scale. Practical pipelines thus layer PTIME and FPT routines (saliency, gnostic neuron scan, quasi-minimal circuit search) with heuristic or approximate algorithms (SAT/QBF solvers, greedy or differentiable selection) (Adolfi et al., 2024). Trade-offs are guided by circuit size, faithfulness/completeness, memory footprint, and task specificity.

Limitations include:

• Scalability constraints in exact global search and path enumeration.
• Sensitivity of LLM-based schema generation to example diversity and prompt validity (Haklay et al., 7 Feb 2025).
• Approximate subgraph selection, with NP-hard optimal circuit search addressed only by greedy or ILP approximation.
• Task dependence of faithfulness/completeness, requiring validation on held-out data and under strict ablation.

7. Future Directions and Extensions

Ongoing and future work in circuit discovery pipelines includes:

• Enhanced schema flexibility for highly-variable, free-form input data and chain-of-thought reasoning.
• Leveraging learned or attention-derived latent schemas in place of static or LLM-generated ones.
• Integration of causal-interpretability methods such as DAS and path-patching for fine-grained mechanistic analysis across modalities.
• Extension to structured circuits (optionally repeated, keyed, or latent sub-circuits), hierarchical or compositional circuit architectures, and applicability to large multimodal models.
• Unifying differentiable and combinatorial selection techniques for optimal trade-offs under resource and interpretability constraints.

Systematic circuit discovery pipelines are now fundamental to mechanistic interpretability, providing rigorous, scalable, and increasingly efficient frameworks for understanding the internal computation of both classical and emerging neural architectures (Haklay et al., 7 Feb 2025, 2505.10039, Wang et al., 27 Oct 2025, Yu et al., 2024, Haider et al., 11 Dec 2025, Adolfi et al., 2024, Rajaram et al., 2024, Kwon et al., 3 Aug 2025, Li et al., 20 Jul 2025, Gao et al., 28 Feb 2025, Chen et al., 2024, Nikankin et al., 28 Oct 2025, Jafari et al., 28 Aug 2025, Potoček et al., 2018).