Custom-Built Daughter Board

• Custom-Built Daughter Board is a specialized hardware module that expands embedded systems with tailored I/O connectivity and signal conditioning.
• The design prioritizes minimal signal degradation, featuring 1 kΩ resistors and channel-enable switches for accurate 1:1 signal mapping.
• It supports applications in digital instrumentation by enabling flexible peripheral interfacing and reliable firmware integration for signal acquisition and calibration.

A custom-built daughter board is an application-specific hardware expansion module designed to interface with a base embedded system, providing tailored I/O connectivity, signal conditioning, and auxiliary functionality not present on the main board. In research-focused embedded system deployments such as digital oscilloscopes, these daughter boards serve as critical bridges for signal acquisition, user input, calibration, and interaction with external laboratory equipment. The design of such hardware prioritizes pin-compatibility, minimal signal degradation, and reliable integration with the main microcontroller or SOC.

1. Electrical Architecture and Mechanical Integration

Custom-built daughter boards are constructed to map specific embedded system resources to external signals or user interfaces. In a canonical implementation for the Nuvoton NUC-140 microcontroller, the daughter board exposes two BNC probe connections for oscilloscope channels, a matrix keypad for user input, a calibration output, and a set of jumper-controlled signal routes for reconfigurable ADC channel assignments (Romero et al., 23 Dec 2025). Each ADC input path incorporates a 1 kΩ series resistor for fundamental overcurrent and ESD protection. No RC filters or attenuators are included, ensuring that only 1:1 scope probes provide undistorted input, with channel-enable slide switches for isolation between channels. The hardware design omits active buffering or analog multiplexing, thus minimizing offset and noise coupling.

2. Signal Conditioning and Protection

The principal signal integrity mechanism is the inclusion of 1 kΩ series resistors on each of the eight ADC input lines, directly on the daughter board. This approach offers basic short-circuit and transient protection for both the microcontroller ADC inputs and the external device under test. Absence of passive analog filtering or attenuating networks is a deliberate choice in the reference design, as any such component would introduce frequency-dependent attenuation or phase shifts relevant at oscilloscope bandwidths. Consequently, only probes with 1:1 transfer characteristics are supported without distortion; signals are isolated, but not level-shifted or filtered, before digitization. Channel-enable switches provide additional user-level control over signal mapping and ensure floating channels do not introduce crosstalk (Romero et al., 23 Dec 2025).

3. Peripheral Interfacing and Routing

The daughter board's 2×8 jumper header delivers flexible mapping between the MCU's ADC_CH0…ADC_CH7 and the external BNC probe jacks, enabling arbitrary choice of analog input channel per probe port. PWM output from the main board (e.g., for probe calibration square waves) is routed to a dedicated header pin, compatible with calibration routines in oscilloscope use cases. The external 3×3 keypad is interfaced via dedicated microcontroller GPIO lines—specifically, as output (rows: GPE_1,3,5) and input (columns: GPE_2,4,6)—allowing reliable matrix scanning with hardware debounce support. Mechanical placement and pinout of these interfaces follow platform-specific constraints for stacking and enclosure compatibility (Romero et al., 23 Dec 2025).

4. System Integration and Firmware Considerations

Firmware on the NUC-140 is architected to treat daughter board signals as first-class peripherals. ADCs operate in continuous or single-scan mode as dictated by oscilloscope trigger settings, and sampled data from the BNC-connected channels are processed via interrupt-driven routines for buffer acquisition and subsequent display on an ST7565R-compatible LCD, communicated over SPI0. Keypad events are detected via GPIO state changes, triggering corresponding mode transitions in collection, trigger arming, or channel calibration. Probe calibration leverages the daughter board’s direct access to the PWM-driven square-wave, switching the pin between PWM and GPIO output modes to acquire reference highs and lows by averaging 128 ADC samples per state (Romero et al., 23 Dec 2025).

5. Limitations and Channel Fidelity

Due to the lack of active or adaptive analog front-end (AFE) functionality, channel fidelity is bounded by probe and resistor linearity and the intrinsic ADC characteristics. The voltage resolution per sample is determined by $$V_{\mathrm{LSB}} = V_{\mathrm{ref}} / 2^{N_{\mathrm{ADC}}}$$, yielding $\approx 0.806$ mV for $N_{\mathrm{ADC}}=12$, $V_{\mathrm{ref}}=3.3$ V (Romero et al., 23 Dec 2025). The ADC sampling rate is set by the programmable divider $T_s = \mathrm{ADC}_N / f_{\mathrm{CLK\_ADC}}$, where $f_{\mathrm{CLK\_ADC}} = 22.1$ MHz; this yields controllable Nyquist and temporal scaling for waveform display. Absence of input filtering imposes the responsibility of pre-conditioning high-frequency or noisy signals onto the experimenter or external probe hardware.

6. Application in Embedded Instrumentation

In the context of digital oscilloscope design, the custom daughter board allows replication of 90% of routinely used instrumentation features—including dual channel input, trigger modalities (auto, edge, single), real waveform visualization with horizontal and vertical scaling, and user-driven probe calibration—via the NUC-140 platform and firmware stack (Romero et al., 23 Dec 2025). The overall system facilitates channel enable/disable, supports real-time analog signal visualization at rates bounded by ADC configuration and LCD refresh cycles, and enables robust usage in laboratory signal debugging and validation.

7. Comparative Discussion and Design Implications

Comparison with alternative expansion methodologies demonstrates that a minimalist daughter board, relying on pass-through analog signal routing and essential protection, enables high-fidelity signal acquisition with reduced cost and complexity, at the expense of advanced analog manipulation (e.g., variable attenuation, differential amplification). Mechanically, such designs offer easy modification, re-routing, or adaptation for nonstandard peripherals or experimental setups. For researchers, this flexibility is central to rapid prototyping and deployment of specialized embedded instrumentation, though it requires vigilance with respect to aliasing, overvoltage, and probe compatibility (Romero et al., 23 Dec 2025).