FTCircuitBench: Fault-Tolerant Quantum Suite

• FTCircuitBench is an open-source benchmark suite and modular toolkit that evaluates fault-tolerant quantum compilation and architectures using real-world quantum circuits.
• It features curated libraries, multiple logical circuit decompositions—such as Clifford+T and Pauli-Based Computation—and comprehensive metrics like T-count and modularity.
• The toolkit offers an extensible Python pipeline for algorithm and hardware co-design, enabling optimized benchmarking and advanced compilation strategies.

FTCircuitBench is an open-source benchmark suite and modular toolkit designed to evaluate and drive research in fault-tolerant quantum compilation and architecture. It provides a curated library of real-world quantum algorithms, multiple logical circuit decompositions (notably Clifford+T and Pauli-Based Computation), and comprehensive metrics for analyzing compilation efficiency, space-time resource consumption, and architectural suitability. FTCircuitBench is architected to be extensible at every stage of the compilation pipeline, supporting algorithm and code co-design for next-generation fault-tolerant quantum systems (Harkness et al., 6 Jan 2026).

1. Benchmark Suite: Algorithms, Models, and Pre-Compiled Formats

FTCircuitBench encompasses a diverse set of quantum benchmark circuits reflecting the current landscapes of quantum algorithmics, with each included at a variety of instance sizes. Key classes include:

• Arithmetic Subroutines: Ripple-carry adders (4–64 qubits), Quantum Fourier Transforms (4–63 qubits).
• Quantum Simulation:
  • Electronic-structure Hamiltonians (second-quantized H₂, 6–12 qubits, various bond lengths).
  • Fermi-Hubbard models (1D, 2D square and triangular lattices, 18–200 qubits, 5 and 20 Trotter steps).
  • Heisenberg and Ising models (1D, 2D, 9–100 qubits).
• Algorithmic Benchmarks:
  • Quantum phase estimation (QPE) for molecular and lattice systems.
  • HHL linear-systems solvers (8–12 qubits).
  • Quantum Singular Value Transformation (QSVT) for circulant matrix inversion (6–13 qubits).

Each benchmark is distributed in two canonical, fault-tolerant logical circuit models:

• Clifford+T: Decomposition into universal {Clifford gates} ∪ {T, T†}, supporting T-count/lattice surgery analysis essential for surface-code architectures.
• Pauli-Based Computation (PBC): Circuits represented as layers of commuting Pauli-product rotations and measurements, with all Clifford operations absorbed into measurement updates. This model is tailored for high-rate qLDPC code development and adaptive measurement protocols.

2. Modular Compilation Pipeline and Custom Passes

FTCircuitBench features a Python library implementing a user-extensible, stage-wise compilation pipeline (Figure 1 in (Harkness et al., 6 Jan 2026)), supporting code and architecture co-design. The pipeline includes:

• Front-end/IR: QASM input for circuits with arbitrary single-qubit $R_z(\theta)$, CNOTs, etc.
• Clifford+$R_z$ → Clifford+T Synthesis:
  • Euler decomposition of single-qubit gates into $\{R_z\}$ + Cliffords.
  • Two ancilla-free synthesis engines:
  • Gridsynth (Ross–Selinger): Decomposes $R_z(\theta)$ to $T$ gates with precision $\varepsilon$, $T_\mathrm{count}\approx 3\log_2(1/\varepsilon)$.
  • Solovay–Kitaev: Recursive synthesis scheme, $T_\mathrm{count}=O(\log^c(1/\varepsilon))$, $c\approx3.97$.
• Clifford+T → PBC Transformation:
  • Reverse tableau pass absorbs Cliffords; non-Clifford ($T/T^\dagger$) gates expressed as Pauli $Z$ rotations $R_Z(\pm\pi/4)$.
  • Optimization layers merge and reduce Pauli-product rotations.
• Architecture-Specific Decomposition:
  • Surface code: Rotated-lattice with magic state injection and lattice surgery for CNOT/S.
  • High-rate qLDPC (“gross” bivariate bicycle code): Supports constant-rate encoding and efficient multi-qubit operator execution in PBC.
• Custom Compilation Passes: Users add new passes by subclassing PipelinePass and registering via the API or CLI, enabling domain-specific optimization strategies (e.g., $R_z$ gate merging, code-specific scheduling, PBC weight reduction).

3. Evaluation Toolkit: Metrics and Analysis Framework

The FTCircuitBench analysis pipeline automatically computes a comprehensive suite of metrics at gate, circuit, and structural levels using the following formulations:

• Gate Counts and Depth:
  • Total gate count: $N_{\mathrm{gates}}=|\{g\}|$.
  • $T$-count: $$T_{\mathrm{count}} = \sum_{g\in G}\delta(g\in\{T,T^\dagger\})$$.
  • Depth $D$ by circuit layering.
• Fidelity:
  • Approximation fidelity for compiled $R_z$ rotations: $$F = \prod_{i}F_i \quad,\quad F_i = |\mathrm{Tr}[R_z(\theta_i)^\dagger\widetilde R_z(\theta_i)]|/2$$.
• Space-Time Volume:
  • $V = \sum_{q} d_q$, where $d_q$ is the cycle participation count for qubit $q$.
• Interaction Graph Analysis:
  • Edges represent either CNOTs (Clifford+T) or shared support in PBC operators; edge weights $w_{uv}$ compute connectivity.
  • Graph density: $$\mathrm{density}(G) = \frac{\sum_{(u,v)\in E} w_{uv}}{ \frac{|V|(|V|-1)}{2} }$$.
  • Modularity via Louvain method: $$Q=\sum_{c}\left[\frac{L_c}{m}-\left(\frac{k_c}{2m}\right)^2\right]$$.
• PBC and T-Gate Locality:
  • T-density and PBC-rotation density as heat maps over time and qubit indices.
  • Pauli-weight distributions (histograms of operator support sizes).

4. Example Workflows and Representative Data

End-to-end usage is enabled by programmatic and command-line interfaces. For the 64-qubit ripple-carry adder at $\varepsilon=10^{-8}$, the workflow comprises:

from ftcbench import ( load_qasm_circuit, transpile_to_gridsynth_clifford_t, analyze_clifford_t_circuit, convert_to_pbc_circuit, analyze_pbc_circuit, ) circ = load_qasm_circuit("qasm/adder/adder_64q.qasm") _, ct_circ = transpile_to_gridsynth_clifford_t(circ, gridsynth_precision=8) ct_stats = analyze_clifford_t_circuit(ct_circ) print("T-count:", ct_stats["t_count"]) # → 392 print("Total gates:", ct_stats["total_gates"]) # → 988 print("Graph modularity:", ct_stats["modularity"]) # → 0.84 pbc_circ, pbc_stats = convert_to_pbc_circuit(ct_circ) pbc_results = analyze_pbc_circuit(pbc_circ, pbc_stats) print("Raw PBC rotations:", pbc_results["raw_rotations"]) # → 392 print("Optimized rotations:", pbc_results["opt_rotations"]) # → 224 print("Rotation reduction:", pbc_results["rotation_reduction"])# → 42.9%

Summary data for the same circuit include: Clifford+T gates 988, T-count 392, depth 369, graph modularity 0.84, PBC raw rotations 392 reduced to 224 (42.9%), average Pauli weight increases from 4.33 to 5.60, and PBC modularity ~0.78.

5. Extension, Customization, and Open-Source Integration

FTCircuitBench is distributed as an open-source Python package, with source code, QASM circuits, analysis routines, and sample Jupyter notebooks organized for direct integration into research workflows:

• Installation: pip install ftcircuitbench
• CLI: ftcbench-analyze --qasm qasm/adder_64q.qasm --mode gridsynth --eps 1e-8
• Adding new benchmarks: place .qasm files in the designated directory and update metadata files for automatic pipeline inclusion.
• Custom passes: Implement via subclassing and registration; invoked automatically during pipeline execution.

The directory structure encompasses source (transpile, analysis, passes), benchmark inputs, documentation, and interactive examples.

6. Research Significance and Opportunities

FTCircuitBench addresses the need for unified benchmarks, transparent pipeline evaluation, and architecture-aware optimization in the transition from the NISQ regime to large-scale, error-corrected quantum computation. It uniquely provides:

• End-to-end benchmarking across 160+ circuit instances and four decomposition pipelines (Gridsynth, Solovay–Kitaev at varying precisions).
• Quantitative comparison between Clifford+T and PBC models, informing trade-offs between different fault-tolerant schemes (e.g., surface code vs. high-rate qLDPC).
• Modular framework for evaluating the impact of compiler passes, synthesis techniques, and architectural constraints.
• Reference numerical analysis enabling co-design of logical algorithms, compilation strategies, and hardware primitives (Harkness et al., 6 Jan 2026).

A plausible implication is that FTCircuitBench will facilitate more rigorous, reproducible research into fault-tolerant algorithm design and logical compilation methodologies, catalyzing progress toward scalable quantum computing.