Layer Integration Module (LIM)

• LIM is an innovative design that embeds thin silicon pixel sensors into scintillating-fiber calorimeters to enhance position and timing resolution.
• Optimized sensor placement at approximately 5X₀ achieves a 56% improvement in spatial and a 26% improvement in timing resolution while preserving energy measurement.
• This integration results in enhanced physics sensitivity, demonstrated by a 16% gain in signal significance for low-energy photon channels.

The Layer Integration Module (LIM) is an architectural innovation for electromagnetic calorimeters that achieves enhanced position and timing resolution by integrating thin silicon pixel sensor layers into the longitudinal sampling structure of scintillating-fiber calorimeter modules. In the configuration explicitly realized in the hybrid SpaCal–Silicon electromagnetic calorimeter, as reported in (Fei et al., 22 Sep 2025), two monolithic silicon pixel layers are inserted at an optimized longitudinal position, resulting in a 56% improvement in spatial resolution and 26% improvement in timing, while maintaining comparable energy resolution to traditional designs. These advances translate into measurable enhancements in physics sensitivity, including a 16% increase in signal significance for low-energy photon channels.

1. Structural Design and Geometry

The LIM concept is built on the integration of two 0.5 mm-thick silicon-pixel readout layers into the segmented sampling structure of a scintillating-fiber calorimeter module. The hybrid SpaCal–Silicon module stack, oriented along the beam direction, consists of three primary zones:

• Front SpaCal section: This comprises tungsten (W) or lead (Pb) absorber plates with embedded scintillating fibers (GAGG or polystyrene), with a cell cross section of 15×15 mm². For the W-GAGG version, the thickness is 35 mm (5 $X_0$); for Pb-Polystyrene, 75 mm (5 $X_0$).
• LIM (Silicon-pixel sandwich): Two silicon monolithic pixel sensor layers (active thickness 0.5 mm), segmented into 5×5 mm² cells, are mounted on either side of a 6 mm copper cooling plate. Each pixel layer is supported by a 3.6 mm FR4 PCB substrate and reflective foil adjacent to the scintillator.
• Back SpaCal section: This zone continues the absorber-fiber structure, with W-GAGG at 105 mm (15 $X_0$) and Pb-Polystyrene at 210 mm (15 $X_0$).

The table below summarizes the key dimensions and materials:

Parameter	W-GAGG-Si	Pb-Polystyrene-Si
Absorber material	Tungsten	Lead
Active scintillator	GAGG	Polystyrene
Silicon layer thickness	0.5 mm	0.5 mm
Cooling layer thickness	6 mm	6 mm
PCB thickness (FR4)	3.6 mm	3.6 mm
Pixel cell size	5×5 mm²	5×5 mm²
SpaCal cell size	15×15 mm²	15×15 mm²
Front SpaCal thickness	35 mm (5 $X_0$)	75 mm (5 $X_0$)
Back SpaCal thickness	105 mm (15 $X_0$)	210 mm (15 $X_0$)
Number of longitudinal layers	4 (incl. Si)	4 (incl. Si)

2. Optimization of Silicon Layer Placement

Performance optimization centers on maximizing minimum ionizing particle (MIP) density and spatial separation power at the silicon layers. By scanning time and position resolutions versus silicon depth (parameterized in radiation lengths $X_0$), the study determined both resolutions reach minima within the 5–8 $X_0$ range from the calorimeter entrance. Therefore, the dual-layer LIM is positioned at approximately 5 $X_0$0 for cost-performance optimization. Extending beyond two silicon layers or dispersing them across multiple $X_0$1 windows provided no significant gain.

3. Signal Reconstruction and Parameterization of Resolution

Energy deposited in each pixel cell $X_0$2 of the silicon layers is accumulated as $X_0$3 with corresponding time $X_0$4. The deposited energy is converted to a MIP count via the most probable value (MPV) of a Landau distribution for a single MIP in 0.5 mm silicon.

Key resolution parameterizations:

• Energy resolution:

$X_0$5

Empirically, W-GAGG yields $X_0$6, $X_0$7; W-GAGG-Si: $X_0$8, $X_0$9.

• Position resolution:

$X_0$0

The LIM reduces the $X_0$1 coefficient by approximately 56%, e.g., at $X_0$2 GeV: W-GAGG gives $X_0$3 mm, whereas W-GAGG-Si achieves $X_0$4 mm.

• Time resolution:

$X_0$5

Silicon layers yield $X_0$6 ps, a 26% improvement over the baseline $X_0$7 ps.

4. Simulation, Modeling, and Validation

The performance and design optimization employs a simulation chain:

• Scintillator modeling: Full Geant4 (v10.7) Hybrid-MC code incorporating detailed tungsten/lead geometry, fiber positions, refractive indices, scintillation yields (GAGG: 56 ph/keV), and optical transport, including crosstalk.
• Silicon layers: Parameterized simulation pipeline involving:
  1. Recording $X_0$8 per 5×5 mm² pixel.
  2. Conversion to MIP count using Landau MPV.
  3. Output voltage $X_0$9 mV × $X_0$0.
  4. ADC digitization (12-bit, $X_0$1 V).
  5. Time resolution scaling as $X_0$2 ps/ADC $X_0$3 14 ps.
  6. Gaussian time smearing.

Validation includes:

• Test-beam comparison of silicon timing versus CMS HGCAL silicon measurements.

• Landau MPV fits to thin-silicon energy-deposit data.
• Optical-fiber response tuning to proto-SpaCal test beam performance. Statistical uncertainties from MC ensembles of $X_0$4 single photons are 1–2%.

5. Quantitative Performance Improvements

Empirical data from the resolution-vs-energy curves provide:

• Position resolution: Improvement of ≈56% for $X_0$5 GeV, e.g., from 0.30 mm to 0.13 mm at 20 GeV.
• Timing resolution: Improvement of ≈26% at $X_0$6 GeV, e.g., from 180 ps to 133 ps. These correspond to $X_0$7 and $X_0$8.
• Energy resolution: Remains within 5% relative degradation due to extra inactive material. For all practical purposes, the energy performance is preserved.

6. Enhancement in Physics Capability

Signal significance is expressed as

$X_0$9

where $X_0$0 and $X_0$1 denote the selected signal and background yields.

• In the low-energy photon channel $X_0$2, optimized timing cuts yield an increase in $X_0$3 from 4.8 (SpaCal baseline) to 5.6 (SpaCal–Silicon) at constant efficiency, corresponding to a 16% gain in $X_0$4.
• In hard-photon channels, such as $X_0$5, the significance increase is 5–8%.

7. Generalization, Applicability, and Limitations

The LIM architecture generalizes to any longitudinally segmented sampling calorimeter with appropriate segmentation and silicon sensor customization. Variations in pixel thickness, pitch, and number of silicon layers can accommodate different shower maxima, extending applicability to hadronic calorimetry.

Key application domains include high-pileup environments (HL-LHC, FCC-ee), forward calorimetry, and pre-shower detection in $X_0$6 Higgs factories. Additional benefits include photon/neutral-pion discrimination, timing-based pileup rejection, and improved vertex tagging for photons.

Limitations comprise:

• Slight (≤5%) degradation in downstream energy resolution due to passive material.
• Increased fabrication and integration costs for silicon sensors and cooling infrastructure.
• Engineering and calibration challenges related to mechanical, thermal, and timing alignment.

Foreseen advances include the adoption of monolithic active pixel sensors (MAPS), sub-millimeter pixel sizes, on-chip time-to-digital conversion, and possible integration of flavor-tagging pixel layers at the calorimeter’s entrance.

In summary, the Layer Integration Module (LIM) marks a significant step forward by fusing scintillator-based sampling with embedded silicon micro-pixelation, resulting in marked improvements in calorimeter spatial and temporal resolution while preserving calorimetric energy measurement performance. The technique provides enhanced sensitivity for both low- and high-energy physics analyses in collider experiments (Fei et al., 22 Sep 2025).