Mixed-Configuration Quantization

Updated 31 January 2026

Mixed-configuration quantization is a technique that allocates different bit-widths across neural network components to balance accuracy and resource constraints.
It leverages sensitivity metrics, continuous relaxations, and hardware-aware search algorithms to efficiently optimize performance and resource usage.
The approach supports both post-training and quantization-aware training, enabling effective deployment on modern hardware platforms.

Mixed-configuration quantization is a set of strategies that allocate different numerical precisions to different components of neural network models, allowing for locally or globally adaptive bit-width assignments. This approach takes advantage of modern hardware's support for fine-grained, heterogeneous arithmetic and is central to reducing memory, latency, and power consumption subject to strict accuracy and resource constraints. Mixed-precision quantization methods span post-training and quantization-aware training regimes, employ sensitivity or information-theoretic search proxies, leverage continuous relaxations for differentiability, and often integrate hardware-aware or performance-driven allocation algorithms.

1. Mathematical Formulation and Optimization

Mixed-precision quantization assigns each quantizable tensor (layer, channel, window, KV-cache segment, etc.) a bit-width $p_i$ from a discrete set $\mathcal B$ such as $\{2,4,8,16\}$ (Schaefer et al., 2023). The standard problem formulation is a constrained integer optimization: $\begin{aligned} & \min_{\mathbf p\in\mathcal B^N} \sum_{i=1}^{N} \mathrm{Lat}(p_i) \ & \text{s.t.}\quad A(\mathbf p)\;\ge\;A_0 - \epsilon \quad\text{and}\quad \sum_{i} \mathrm{Size}(p_i)\leq M_{\max} \end{aligned}$ Here $A(\mathbf p)$ denotes post-quantization accuracy, $\mathrm{Lat}(p_i)$ hardware-inferred latency, $\mathrm{Size}(p_i)$ storage, and $\epsilon$ sets the allowed accuracy loss. This formalism supports alternate objectives (e.g., energy, throughput).

Several extensions model channel-wise weighted constraints (Chen et al., 2024), output-feature granularity for Transformers (Zheng et al., 2024), kernel-level assignment (Yang et al., 2020), fractional or continuous bit-width relaxation (Yang et al., 2020), or Pareto frontier multi-objective search (Chen et al., 2024).

Continuous relaxations for differentiable search (as in CSQ and FracBits) introduce soft bit-selection and bit-value representations; e.g., sigmoidal proxies for mask gates or linear interpolation between integer quantizers (Xiao et al., 2022, Yang et al., 2020).

2. Sensitivity Metrics and Proxy-Based Allocation

Optimal bit-width allocation is computationally intractable for large $\mathcal B^N$ search spaces. Efficient proxy metrics approximate layer/channel/segment sensitivity to quantization noise:

Local sensitivity proxies:
- Quantization error (QE): Layer-wise normalized RMSE between original and quantized values (Schaefer et al., 2023, Kloberdanz et al., 2023).
- Noise Injection (NI): Accuracy drop after adding Gaussian noise scaled to weight magnitude (Schaefer et al., 2023).
- Hessian-trace: Trace of $\nabla^2_{W} L(x,W)$ via Hutchinson’s estimator, measuring sharpness in loss landscape (Schaefer et al., 2023, Chen et al., 2024).
Global information flow:
- Mutual information: Measures cascading impact of quantization error on downstream layers using Sliced Mutual Information (InfoQ) (Akbulut et al., 6 Aug 2025). Layer sensitivity score $S(i,b)$ aggregates $\Delta$ SMI in observer layers.
Task-centric, semantic proxies:
- Class separability (CSMPQ): Adapts TF–IDF from NLP to quantify discriminative information in layer activations; layer importance converted into LP objective weights (Wang et al., 2022).
Activation norm and calibration statistics:
- Per-channel activation norms for channel-wise allocation (CMPQ) (Chen et al., 2024); range-score in FlexiQ (Kim et al., 3 Oct 2025).

Gradient-based loss change (MixLLM, KVmix) globally ranks rows or KV projections by expected loss increase under quantization (Zheng et al., 2024, Li et al., 18 May 2025).

3. Search Algorithms and Configuration Assignment

Many algorithms operationalize the assignment of mixed precision, given sensitivity rankings:

Progressive greedy search (Schaefer et al., 2023): Iterate through tensors/layers, tentatively lowering bit-width if accuracy is sufficient, locked at lowest value that satisfies constraint.
Bisection search (Schaefer et al., 2023): Sort tensors by sensitivity, assign lowest bit to the largest prefix that satisfies overall accuracy constraint.
Integer Linear Programming (ILP) (Chen et al., 2024, Jia et al., 22 Oct 2025, Akbulut et al., 6 Aug 2025, Huang et al., 2023, Wang et al., 2022): Layer/channel bit-widths treated as decision variables, optimizing a weighted sum of sensitivity scores subject to memory/BOP/latency constraints.
Global one-pass assignment (MixLLM): Compute salience scores for all output-features, sort, and assign high-accuracy bit to top $k$ under the global budget (Zheng et al., 2024).
Chunk-based routing with MoE (MoQAE): Quantization bit-width assignments at the chunk level using a router trained to balance accuracy and bit usage, incorporating freezing and sharing mechanics (Tao et al., 9 Jun 2025).
Evolutionary and genetic algorithms (FlexiQ, MixA-Q): Selection of channel/window bit-masks to minimize output error under resource budget; evolutionary search over population for trade-off optimization (Kim et al., 3 Oct 2025, Wang et al., 25 Jul 2025).
Continuous bi-level sparsification (CSQ): Layer-wise bit-masks and bit-values trained in tandem with temperature-controlled sparsity penalty for target bit-budget (Xiao et al., 2022).

4. Training Paradigms and Calibration

Mixed-config quantization methods operate in post-training (PTQ) and quantization-aware training (QAT) regimes:

Pure PTQ strategies calibrate scales (max-value, grid search, or backprop over scale parameters) (Schaefer et al., 2023, Chen et al., 2024, Kloberdanz et al., 2023), often coupled with outlier protection and scale-retuning.
QAT approaches (SDQ, CSQ, FracBits, ADQ) jointly optimize weights and bit-widths over dedicated loss objectives, regularization (e.g., entropy-aware bin regularization), and knowledge distillation (Huang et al., 2022, Xiao et al., 2022, Yang et al., 2020, Jia et al., 22 Oct 2025).
EMA-based codebook adaptation (ADQ): Non-uniform quantizers update centroids using exponential moving averages during QAT to track distribution drift (Jia et al., 22 Oct 2025).
Router-only fine-tuning (MoQAE): Uniquely, only the quantization router (not model weights) is trained using a composite loss balancing accuracy and memory usage (Tao et al., 9 Jun 2025).

Outlier extraction and tailored codebook design (MixLLM, CMPQ, ADQ) preserve accuracy by globally identifying channels/weights with disproportionate impact on output loss and storing them in higher precision (Zheng et al., 2024, Chen et al., 2024, Jia et al., 22 Oct 2025).

5. Hardware-Aware and Adaptive Quantization

Modern quantization frameworks are increasingly hardware-centric and support dynamic adaptation:

On-chip quantization-aware pipeline (OHQ): All latency, power, and throughput metrics obtained from direct execution on target hardware (FPGA, NPU), informing ILP allocation (Huang et al., 2023, Chang et al., 2020, Chang et al., 2020).
Mixed-scheme quantization for FPGAs (MSQ, MSP): Intra-layer partitioning between LUT- and DSP-friendly quantizers (SP2 vs. fixed-point), maximizing device utilization and throughput (Chang et al., 2020, Chang et al., 2020).
Activation sparsity and window-based assignment (MixA-Q): Within ViTs, important windows processed at high bits, less critical at low bits; two-branch architecture enables both PTQ and QAT integration (Wang et al., 25 Jul 2025).
Dynamic per-chunk, per-token, or per-recent-context adaptation (MoQAE, KVmix): MoE routers or score-driven heuristics allocate precision dynamically in long-context LLM inference or KV-cache (Tao et al., 9 Jun 2025, Li et al., 18 May 2025).
Real-time adaptive control (FlexiQ): Bitwidth ratios are adjusted in feedback fashion to maintain latency SLAs under fluctuating inference loads (Kim et al., 3 Oct 2025).

6. Granularity of Assignment

Assignment granularity spans:

Granularity	Papers	Typical Use
Layer-wise	(Schaefer et al., 2023, Akbulut et al., 6 Aug 2025, Huang et al., 2022, Xiao et al., 2022, Kloberdanz et al., 2023)	Classical DNN quantization
Channel-wise	(Chen et al., 2024, Zheng et al., 2024, Yang et al., 2020, Kim et al., 3 Oct 2025)	Transformer, CNNs, LLMs
Output-feature	(Zheng et al., 2024)	Transformer MatMul optimization
Window/block	(Wang et al., 25 Jul 2025)	Vision transformers (Swin)
Chunk/token	(Tao et al., 9 Jun 2025, Li et al., 18 May 2025)	Long-context LLM inference
Kernel/filter	(Yang et al., 2020, Kim et al., 3 Oct 2025)	CNN kernel-wise allocation

The choice is often hardware-driven: channel-wise or output-feature granularity enables maximum utilization of vector instructions or hardware tiling, while window/activation-based sparsity matches the computation flow in ViTs.

7. Experimental Evaluations and Trade-Offs

Representative empirical results illustrate the impact of mixed-configuration quantization:

ResNet-50 (ImageNet, PTQ) (Schaefer et al., 2023): Uniform 8-bit → 76.60% top-1 (−0.33%), mixed-precision Greedy+Hessian → 76.28% (–0.65%) at 49% model size, 27.6% latency reduction.
MobileNetV2 (ImageNet, QAT) (Huang et al., 2022): SDQ mixed-3.79-bit/4-bit model → 72.0% top-1, outperforming uniform 4-bit and full-precision baselines.
ResNet-18 (ImageNet, InfoQ) (Akbulut et al., 6 Aug 2025): Weight-only at average 3 bit: 70.94% (vs FP 70.60%), 10.66× compression.
Transformer LLMs (MixLLM) (Zheng et al., 2024): LLaMA-3.1-70B, W4.4A8 quantization: 3.02 PPL (vs FP16 2.81), 1.90× throughput, 0.93 higher MMLU-Pro over SOTA.
Vision Transformer (FlexiQ) (Kim et al., 3 Oct 2025): 50% 4-bit, rest 8-bit: only 0.6% accuracy drop, 40% of the speedup of full 4-bit.
KV Cache (KVmix) (Li et al., 18 May 2025): Key 2.19-bit/Value 2.38-bit: 4.9× memory savings, 5.3× throughput, <1% average accuracy drop.
FPGA DNNs (MSQ/MSP) (Chang et al., 2020, Chang et al., 2020): Mixed scheme achieves 2–3× throughput improvements, up to +0.51% accuracy over fixed-point only.

Fine-grained, sensitivity-guided mixed-precision consistently outperforms uniform quantization for given resource budgets, often exceeding full-precision accuracy when coupled with QAT, entropy-aware calibration, or knowledge distillation (Huang et al., 2022, Xiao et al., 2022, Jia et al., 22 Oct 2025). Hardware mapping and system co-design are critical to achieving these gains without overhead (Zheng et al., 2024, Kim et al., 3 Oct 2025, Huang et al., 2023).

8. Limitations, Open Problems, and Future Directions

Mixed-configuration quantization reveals several challenges:

Proxy fidelity: Local sensitivity metrics (Hessian, QE) miss global, cross-layer propagation of quantization errors. Sliced MI and Taylor-Fisher scores address leakage but incur higher computational cost (Akbulut et al., 6 Aug 2025, Zheng et al., 2024).
Search efficiency: Despite ILP and proxy-NAS acceleration (Chen et al., 2024), Pareto optimality and real-time adaptation for high-dimensional assignments remain open problems.
Scalability: Multi-billion parameter LLMs require group or segment quantization to reduce search complexity and system tuning for efficient kernel launches (Zheng et al., 2024, Tao et al., 9 Jun 2025).
Granularity vs. hardware support: Channel- or output-feature assignment is preferred, but hardware must support flexible packing and mixed execution paths.
Activation quantization: Most methods focus on weights; dynamic mixed-activation assignment in ViTs or CNNs remains less explored.
Hybrid compression: Integration of mixed-precision quantization with pruning, low-rank, or weight sharing is promising yet rarely addressed.

Future work is likely to further integrate information-theoretic global proxies, hardware-in-the-loop constraint solvers, and adaptive real-time policies, as well as extend output-feature and window-based precision control to non-transformer architectures (Zheng et al., 2024, Kim et al., 3 Oct 2025, Wang et al., 25 Jul 2025). Potential application areas include high-throughput LLM inference with long-context, edge deployment under dynamic workloads, and FPGA/ASIC co-designed quantization.