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Parallel List Viterbi Algorithms (PLVA)

Updated 22 February 2026
  • Parallel List Viterbi Algorithms (PLVA) are advanced decoding techniques that maintain multiple survivor paths per state to enhance error resilience in the presence of interference.
  • PLVA extends the classical Viterbi Algorithm by tracking the top P candidate paths at each step, leveraging parallelism and efficient local sorting to reduce error propagation.
  • Applications in satellite AIS detection and PAC code decoding show PLVA's practical benefits, including 2–6 dB PER improvements and reduced latency via early-stop CRC integration.

Parallel List Viterbi Algorithms (PLVA) are a class of high-throughput, low-latency maximum-likelihood sequence estimation (MLSE) techniques that extend the classic Viterbi Algorithm (VA) by retaining a list of the best PP survivor paths at each trellis state, instead of a single best path. This augmentation enables enhanced resilience to channel impairments, such as interference and deep fades, by allowing multiple hypotheses to progress in parallel through the trellis decoding process. PLVA has been successfully applied in domains such as satellite-based Automatic Identification System (AIS) detection and polarization-adjusted convolutional (PAC) decoding, leveraging error-detection codes such as cyclic redundancy check (CRC) for robust candidate selection at the output stage (Kanaan et al., 3 Mar 2025, Rowshan et al., 2020).

1. Motivation and Decoding Problem

In highly loaded or noise-impaired channel environments, the classical VA suffers from catastrophic error propagation due to its hard pruning of all but the most likely path at each trellis state. In the context of satellite AIS reception, high vessel density leads to frequent collisions of GMSK-modulated packets, often resulting in error-prone symbol sequences indistinguishable by standard VA (Kanaan et al., 3 Mar 2025). Similarly, in PAC code decoding, classic VA fails to close the error-correcting performance gap to optimal list or SCL decoders (Rowshan et al., 2020). PLVA addresses these issues by tracking PP candidate paths at each trellis stage, enabling "second-chance" recovery via CRC or similar frame checks whenever the globally optimal path is not among the locally optimal survivors.

2. Formal Algorithmic Structure

In PLVA, decoding proceeds by maintaining, at each depth nn of the trellis, a list of PP best paths for every state σi\sigma_i. At each stage, for each state, all MPM \cdot P possible extensions (MM being the number of incoming branches) of these survivor paths are considered, the PP largest (by cumulative metric) are selected, and associated back-pointers are recorded. At termination, the CC (often CPC \sim P) globally best candidate sequences over all states are backtracked, decoded, and CRC-checked in descending metric order (early-stopping upon first valid CRC), as outlined formally:

Λn+1(i,:)=maxσjσi k=1..P(P){Λn(j,k)+δn(σj,σi)}\Lambda_{n+1}(i,:) = \max{}^{(P)}_{\substack{\sigma_j\to\sigma_i \ k=1..P}} \left\{ \Lambda_{n}(j,k) + \delta_{n}(\sigma_j, \sigma_i) \right\}

where Λn(i,k)\Lambda_n(i,k) denotes the kk-th best metric for state σi\sigma_i at depth nn, and δn\delta_n is the branch metric for the corresponding transition.

For PAC codes, this procedure generalizes by duplicating (when required) and locally pruning survivor lists per state after each expansion, maintaining per-state lists rather than a global list (Rowshan et al., 2020). The process is highly parallelizable, with each state's update at a given depth being independent of the others (Kanaan et al., 3 Mar 2025).

3. Complexity, Parallelism, and Sorting Strategies

PLVA introduces a computational complexity per trellis stage of O(SMP+SPlog(MP))O(SM P + SP \log(MP)) for SS states and MM branches, reducing to O(SPlogP)O(SP \log P) for fixed MM (Kanaan et al., 3 Mar 2025). Over NN stages, the total complexity is O(NSPlogP)O(N S P \log P). By contrast, classical VA operates at O(NS)O(NS). The increase is linear in PP, and, due to the "embarrassingly parallel" nature of state updates, system-level latency can be kept near that of the VA given sufficient processing cores.

Sorting approaches dictate implementation efficiency. In PLVA, local (per-state) sorting retains the best LL survivors for each state by parallel pruning, leveraging local sorting networks. Global list decoders, as in SCL, use centralized sorting across all expanded paths, yielding slightly improved frame error rate (FER) but at much higher sorter depth and latency (Rowshan et al., 2020). For large numbers of states SS, local sorting offers significant reductions in critical path and hardware complexity, often cutting sorter depth requirements by factors of two or more, with only marginal (≈0.1–0.2 dB at FER =104=10^{-4}) loss in error performance.

4. CRC Integration and Candidate Selection

The PLVA gains practical power by leveraging a terminal CRC or similar parity-check: after backtracking the top CC candidates, PLVA applies CRC checks in descending order of path metric, halting at the first positive match (Kanaan et al., 3 Mar 2025). This "early-stop" mechanism sharply limits the post-trellis computational overhead, as only a small subset of CC candidates (often C\ll C) are usually tested before a valid output is found.

For satellite AIS demodulation, this step exploits the 16-bit CRC appended to the 184-bit AIS information frame, converting improved candidate diversity into real gains in packet error rate (PER) without exhaustive post-processing. Analogous gains arise for PAC codes when outer CRCs are used (Rowshan et al., 2020).

5. Performance and Parameter Selection

Simulation studies of PLVA for AIS detection in AWGN and multiuser interference environments demonstrate PER improvements of 2–6 dB over conventional VA, depending on list size PP and final candidate count CC (Kanaan et al., 3 Mar 2025). For example, a coherent VA (P=1P=1) achieves PER =103=10^{-3} at Eb/N08.5\text{Eb}/\text{N}_0 \approx 8.5 dB, while PLVA with P=16P=16 achieves the same PER at 5.5\approx 5.5 dB. Further increases in PP (e.g., P=2048P=2048) approach the nominal MLSE-CRC bound, indicating near-optimality at large lists.

For PAC decoding, increasing the total number of survivors (SLS \cdot L) improves FER, and local sorting is competitive with global SCL—e.g., PLVA with S=32S=32, L=8L=8 exhibits only a 0.1 dB loss relative to SCL with S=64S=64, L=4L=4, with sorter depth halved (Rowshan et al., 2020). Smaller PP values (e.g., 16–128) suffice for most practical SNR and interference scenarios, and further increases yield diminishing gains.

Guidelines for selection of (P,C)(P, C) include:

  • Use modest PP (16–128) to attain substantial PER improvement at practical targets (10310^{-3} to 10410^{-4}).
  • Set CPC \approx P for most applications, with CC modestly above PP if hardware allows.
  • Monitor average CRC checks per frame—if markedly less than CC, CC can be reduced further for efficiency.

6. Implementation Considerations

PLVA is well-suited for parallel hardware and software architectures. Key resource considerations include:

  • Memory for SPS\cdot P path metrics and back-pointers per stage; survivor states and optional partial sums or LLRs as required by decoding variant.
  • Local sorting per state lends itself to low-depth sorters (e.g., $2L$-input bitonic networks) and memory-banking to eliminate contention (Rowshan et al., 2020).
  • In software, state-level parallelism aligns with SIMD or thread-level concurrency, and local survivor pruning reduces cache-miss penalties.

For PAC codes, memory can be reduced by adopting sliding windows for per-path state history, exploiting trellis and polar code structure. Hardware implementations benefit from minimized cycle counts per trellis step, and early-stop CRC-checks curtail output-side latency (Kanaan et al., 3 Mar 2025, Rowshan et al., 2020).

7. Applications and Impact

The principal applications of PLVA are in scenarios where error resilience is paramount and in channels characterized by high multiuser interference or non-ideal memory, such as satellite-based AIS packet detection (Kanaan et al., 3 Mar 2025) and PAC code decoding for advanced communication systems (Rowshan et al., 2020). In satellite AIS, PLVA enables significant throughput gains under heavy load, improves the packet error floor, and effectively lowers the decoding threshold, potentially serving as a front end for more complex interference-cancellation schemes. For PAC coding, PLVA achieves near-ML error rates with dramatically reduced sorter complexity relative to full global list decoders, offering a practical solution for high-rate, low-latency FEC schemes.

The natural parallelism, favorable complexity scaling, and tight integration with error-detecting codes make PLVA a compelling augmentation of classical Viterbi decoding, balancing implementation feasibility and near-optimal error-rate performance.

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