Shared PRNG: Architecture and Applications

• Shared PRNGs are design architectures that produce multiple statistically independent random streams using a common core state across hardware, software, or quantum systems.
• They utilize efficient mechanisms such as LFSR engines, XOR-tap banks, and programmable threshold controllers to ensure stream independence and dynamic output biasing.
• Applications include Monte Carlo simulations, cryptographic systems, parallel computing, and quantum algorithms, demonstrating significant resource efficiency.

A shared pseudo-random number generator (PRNG) refers to a design architecture or algorithm that produces multiple statistically independent random streams – typically for concurrent use across distinct threads, hardware blocks, or computational tasks – by leveraging a common underlying random number engine or state. The concept encompasses hardware, software, and quantum-circuit instantiations, with key applications in parallel simulation, cryptography, optimization, and quantum algorithms. Distinguishing features include programmability of output statistics, resource-efficient state-sharing, and robust stream independence.

1. Architectural Principles of Shared PRNGs

Shared PRNGs implement multiple output streams by replicating lightweight front-end logic per stream (e.g., banks of comparators or distinct output registers), while sharing a single core entropy source. In hardware realizations such as the programmable multi-sequence PRNG (Wu et al., 2024), the key blocks are:

• LFSR Engine: A shift register with primitive polynomial-defined feedback; governs overall state evolution.
• XOR-Tap Bank: Multiple distinct XOR networks select unique sets of LFSR bits (taps) to produce per-stream words.
• Threshold Controller: Supplies programmable statistics (static or dynamic bias) for output modulation.
• Comparator Array: Each stream has a local comparator fed by its tap/threshold logic.

All above blocks except the per-stream XOR-tap/comparator are shared, minimizing gate, power, and memory overhead relative to instantiating $N$ fully independent PRNGs. For quantum circuits, the shared PRNG paradigm allows reuse of a single $n_{\mathrm{PRN}}$-qubit register across all random draws per sample (Miyamoto et al., 2019).

2. State Update, Forking, and Independence

State transition is governed by updates to the underlying primitive or nonlinear recurrence. For LFSR-based hardware:

$f(t) = \bigoplus_{i=1}^n a_i s_i(t)$

$$s_1(t+1) = f(t),\quad s_{i+1}(t+1) = s_i(t),\quad (i=1 \ldots n-1)$$

Multi-stream independence is achieved by choosing unique tap-sets $\mathcal T_j$ for each stream, minimizing overlap per (Wu et al., 2024). Outputs are formed:

$$A_j(t) = \bigoplus_{i \in \mathcal T_j} s_i(t) \in \{0,1\}^m$$

In software PRNGs like Romu (Overton, 2020), independence is guaranteed by cycle-splitting -- hashing a global seed and thread/task index to create distinct, high-entropy starting states. In GPU settings (e.g., xorgensGP (Nandapalan et al., 2011)), each thread-block is allocated its own local buffer state seeded to widely separated points in the generator’s period.

Stream independence is empirically supported by cross-correlation tests:

$$R_{xy}(f) = \frac{\sum_{t=1}^{N-f} (x(t)-\bar x)(y(t+f)-\bar y)}{\sqrt{\sum (x(t)-\bar x)^2} \sqrt{\sum (y(t)-\bar y)^2}}$$

yielding $|R_{xy}(f)| \approx 0$ for distinct streams (Wu et al., 2024).

3. Programmable Output Statistics

Shared PRNGs frequently incorporate mechanisms to modulate output distribution, accommodating application-specific requirements. In (Wu et al., 2024), static thresholding is performed as:

$$PRNG\_OUT_j(t) = \begin{cases} 1 & A_j(t) > T \ 0 & \text{otherwise} \end{cases}$$

for threshold $T$. The probability of a '1' is tuned as:

$P(PRNG\_OUT_j(t) = 1) = \frac{(2^m - 1) - T}{2^m}$

Dynamic thresholding (“annealing schedule”) is implemented via cycle-wise increment of $T$:

$$\mathrm{CCN}(u) = -1.5396 u^2 + 2.4658 u + 0.0055 \quad \Rightarrow \quad \frac{d\,\mathrm{CCN}}{du} = -3.0792 u + 2.4658$$

allowing temporal bias adjustment embedded in hardware logic.

4. Resource Efficiency and Scalability

Resource sharing drastically reduces area, energy, and memory requirements. In (Wu et al., 2024), area per 32-bit LFSR plus 8-bit tap/threshold/comparator is ≈ 0.0013 mm² in 65 nm, energy per bit ≈ 0.57 pJ. Each additional independent sequence requires merely one 8-bit XOR bank and one comparator, negligible compared to the shared modules.

Software and GPU PRNGs exploit shared states to maximize parallel throughput while maintaining statistical quality. In (Nandapalan et al., 2011), each CUDA thread-block consumes only ~516 bytes shared memory. Romu’s “per-thread state” avoids locks and false sharing (Overton, 2020).

PRNG Class	Area/Memory Overhead	Statistical Independence Mechanism
LFSR-shared HW	$O(1)$ for LFSR, $O(N)$ minor	XOR-tap diversity per stream
Xorshift-GPU	$O(1)$ per block (516B)	Seeded per block; long cycle
Romu-multi-thread	$O(1)$ per thread (192-256B)	Seed permutes cycle per thread
Quantum-Circuit	$O(1)$ PRNG register	Jump-ahead unitary for sample index

5. Statistical Tests, Stream Capacity, and Periodicity

High statistical quality of output is established using batteries such as TestU01 (BigCrush), and PractRand. Both Romu (Overton, 2020) and xorgensGP (Nandapalan et al., 2011) pass all stringent tests; MTGP and CURAND fail certain linearity evaluations.

Shared designs are engineered for negligible probability of stream collision/overlap. For RomuTrio (192-bit state), 16,384 parallel streams each of $2^{53}$ outputs have overlap probability $<2^{-40.5}$ (Overton, 2020). GPU PRNGs rely on birthday-paradox arguments to ensure block-level separation within vast generator periods ($2^{4096}$ for xorgensGP).

Capacity estimates for nonlinear PRNGs are derived empirically by cycle-walking and statistical burn-in, scaling log-capacity with state bits (Overton, 2020). This constrains maximum reliable output per stream and job.

6. Quantum Algorithms: Shared PRNG for Qubit-Efficient Monte Carlo

Quantum Monte Carlo for high-dimensional integration, as in quantitative finance, typically demands one register per random number -- quickly exhausting available qubits (Miyamoto et al., 2019). The shared PRNG architecture reduces required qubits from $$Q_{parallel} = n_s + N_r n_{\rm PRN} + n_{\rm int} + a$$ to $Q_{shared} = n_s + n_{\rm PRN} + n_{\rm int} + a$, reusing a single PRNG register per sample by sequential unitary updates:

• PRNG state update by $P_{\mathrm{PRN}}$ unitary (modular multiplication + permutation).
• Jump-ahead $J_{\mathrm{PRN}}$ unitary initializes each sample’s subsequence.
• Qubit reduction is traded for increased circuit depth $$D_{shared} \sim N_r (n_{\mathrm{PRN}}^2 + \mathrm{Depth}(f))$$.

This maintains quantum speed-up versus classical sampling (quantum error $\epsilon$ costs $O(1/\epsilon)$, classical costs $O(1/\epsilon^2)$), with a schematic block diagram illustrating PRNG reuse within amplitude-estimation (Miyamoto et al., 2019).

7. Applications and Implementation Considerations

Domains fundamentally reliant on shared PRNGs include:

• Multi-core systems: efficient provision of many independent random sequences for threads/processes (Wu et al., 2024, Overton, 2020).
• Monte Carlo simulation: cryptography, physics, risk analytics, and machine learning workflows.
• Ising-machine optimization: hardware-based annealing with programmable cooling schedules (Wu et al., 2024).
• Quantum computing: qubit-efficient high-dimensional Monte Carlo via shared-circuit PRNGs (Miyamoto et al., 2019).

Implementation requires careful choice of core generator, stream separation strategy (tap-sets, seed permutations, etc.), and, where needed, programmable biasing. GPU PRNGs necessitate explicit block-level state memory; thread-based PRNGs demand per-thread register allocation avoiding false sharing. Quantum circuit designs employ jump-ahead unitaries and single-register reuse.

A plausible implication is that, as computational architectures continue to scale, stream independence and resource reuse will become central in PRNG deployment, with programmable shared PRNGs increasingly foundational at the hardware, software, and quantum-algorithm levels.