Silicon Photomultiplier (SiPM) Arrays

Updated 25 January 2026

Silicon Photomultiplier (SiPM) arrays are highly segmented matrices of microcell avalanche photodiodes operated in Geiger mode, offering precise photon counting and fast timing.
They employ series–parallel configurations and integrated electronics to reduce capacitance, achieve uniform gain, and support sub-nanosecond resolution across various application domains.
SiPM arrays are crucial in nuclear spectroscopy, medical imaging, astrophysics, and cryogenic experiments, delivering high spatial resolution and robust performance in extreme environments.

Silicon Photomultiplier (SiPM) Arrays are highly-segmented arrays of microcell avalanche photodiodes operated in Geiger mode, engineered for high-precision photon counting and time-of-flight detection across a wide range of applications including nuclear spectroscopy, medical imaging, neutrino and dark matter physics, and Cherenkov light detection. SiPM arrays leverage the parallel operation of thousands of microcells, enabling large-area coverage, insensitivity to magnetic fields, low operating voltage, and mechanical robustness. The transition from single-device SiPMs to tiled or monolithic arrays addresses both the limited area of individual chips and the system-level requirements of spatial segmentation, timing, and high dynamic range.

1. Array Architectures and Geometries

SiPM arrays are constructed by optically or electrically tiling multiple SiPM dies to achieve the required active area and granularity. For moderate area coverage (1–4 cm²), devices such as the SensL MicroFC-60035 (6 × 6 mm²) or Hamamatsu S13360 (various footprints) are arranged in 2×2 or larger matrices with minimal inter-die gaps, coupled directly to the detection media (e.g., scintillators, wavelength shifters) (Liang et al., 2016, Catalanotti et al., 2015). For larger formats or when high granularity is required—such as in Cherenkov telescope cameras, PET, or orbital cosmic-ray detectors—arrays are built from multiple sub-arrays, such as 8×8 tiles of 3×3 or 6×6 mm² devices, or densely tiled quads of 12×12 mm² (Otte et al., 2015, Peres, 2023).

In single-photon applications where ultimate timing or spatial resolution is required, digital SiPM arrays integrate both the Single-Photon Avalanche Diode (SPAD) matrix and readout logic in a CMOS process. These comprise thousands of SPADs (e.g., 32×32 arrays, with ∼30% fill factor) with local digitization, masking, and on-chip time-to-digital converters (TDCs), fully monolithic, minimizing input capacitance and allowing true per-pixel photon counting (Feindt et al., 2024, Diehl et al., 2024).

Custom array topologies include series–parallel configurations to balance total capacitance and simplify readout for time-critical measurements; for example, 4s6p (four-in-series, six-in-parallel) tiling for large cryogenic detectors provides 100 cm² coverage with sub-10 ns timing (Razeto et al., 2022, Zhi et al., 2024).

2. Electronic Readout, Timing, and Summing Schemes

SiPM arrays impose substantial requirements on front-end electronics, primarily due to the aggregate detector capacitance and the need for uniformity, low noise, and precise timing.

For arrays of moderate size, passive summing networks combine the outputs of sub-cells, with readout nodes buffered by high-bandwidth pre-amplifiers (e.g., TI LMH6629, BW ≳ 1 GHz) to preserve fast rise times and minimize timing jitter. Selection of series–parallel topologies allows capacitance reduction per readout channel, improving slew rate and single-photon time resolution (SPTR ∼200–300 ps FWHM for up to 16 SiPMs) (Zhi et al., 2024).

In timing-critical applications such as neutrino telescopes or Cherenkov detectors, differentiated current-mode input stages and fast discriminators—implemented as ASICs in deep submicron CMOS (e.g., 180 nm)—are preferred, enabling channel-level tuning, low power (<7 mW/channel), and integrated digital summation. Test chips demonstrate <500 ps FWHM jitter for 6×6 mm² arrays (Wang et al., 5 Feb 2025).

For large-area, high-channel-count cameras—such as the Schwarzschild–Couder Cherenkov Telescope or the CTA LST—SiPM arrays are paired with front-end ASICs implementing gigasample/s, multi-channel waveform digitization, deep analog buffering, and trigger logic that can handle aggregate readout rates approaching 90 Tb/s. Summation stages (both analog and digital) are designed to preserve the timing performance (∼2–10 ns FWHM) and dynamic range (hundreds of photoelectrons/pixel) (Otte et al., 2015, Heller et al., 2021).

Digital SiPMs (dSiPMs) incorporate the SPAD matrix and TDCs on the same die, leveraging on-pixel hit discrimination, per-pixel masking, and quadrature-based TDCs (e.g., 12 bits, 95 ps bin width) for direct timestamped digital output (Feindt et al., 2024, Diehl et al., 2024).

3. Gain Uniformity, Temperature Stabilization, and Bias

Variations in breakdown voltage (V_bd) between SiPM elements—typically σ_Vbd ≃ 0.12 V or less across a wafer—necessitate per-channel gain matching to ensure uniform response, especially in array configurations (Liang et al., 2016, Barbosa et al., 2011). Passive or active compensation (e.g., per-channel resistor trimming or DAC offset) reduces channel-to-channel spread below ±5%, though moderate non-uniformities (≲15%) do not substantially degrade imaging under typical SPECT/PET configurations (Barbosa et al., 2011).

The temperature dependence of V_bd (typically +15–22.5 mV/°C) and gain mandates bias tracking, implemented via on-board temperature sensors and bias control circuitry:

$V_\text{bias}(T) = V_\text{bias}(T_0) + k_V \cdot (T-T_0)$

where $k_V$ is the measured temperature coefficient. With proper compensation, gain and energy resolution remain within specifications over environmental swings (−20 °C to +50 °C) (Liang et al., 2016, Stiegler et al., 2019). In cryogenic operation (e.g., LAr, LXe detectors), V_bd shifts down by several volts, but gain curves and relative PDE are preserved. Dark count rates drop by 6–7 orders of magnitude across 300 K → 77 K, enabling stable operation with DCR < 2 Hz/mm² (Wang et al., 2022, Catalanotti et al., 2015).

4. Fundamental Performance Parameters and System-Level Metrics

Key SiPM array metrics include:

Parameter	Typical Value / Range	Determinants
PDE (λ ~ 400–470 nm)	25–60%	μ-cell fill factor, QE(λ), over-voltage, SPAD design
Gain (ΔV = 3–7 V)	O(10⁶) per channel	C_pixel, ΔV; scales linearly with ΔV
DCR (25 °C, 3–6 V ov)	50–150 kHz/mm² (warm); <1 Hz/mm² at 87 K	μ-cell design, temperature, over-voltage
Optical crosstalk	5–15%	μ-cell pitch, trenching, over-voltage
Afterpulsing	<5–15%	Process, temperature, over-voltage
Energy resolution	6–8% at 662 keV (NaI/CsI), 13–16% (stilbene)	Photon statistics, electronic noise, summing topology
Time resolution (SPTR)	200–300 ps (∼12 mm²), <50 ps (dSiPM)	Array capacitance, preamp BW, digital chain

Aggregate array behavior (sum output, per-channel signals) is primarily limited by the microcell count per channel, electronic noise, and the fidelity of the readout summing approach. For passively summed large arrays (e.g., 8×8 of 6×6 mm²), energy and timing resolutions approach or surpass the PMT benchmark (energy FWHM 13–16%, timing FWHM 277–300 ps at 341 keVee), and neutron/gamma PSD FOM exceeds 2 at 230–260 keVee (Sweany et al., 2019).

Fill factor and dead-zone engineering are consequential. In digital SiPMs, large inter-SPAD areas (70% dead space) limit direct MIP efficiency to ∼30% unless supplemented by radiators or microlens arrays (Feindt et al., 2024, Diehl et al., 2024). In analog or passive arrays, careful mechanical assembly achieves active area fill factors exceeding 90% in modern cameras (Heller et al., 2021).

5. Advanced Reconstruction and Position Sensitivity

Position-sensitive arrays employ specialized architectures such as linearly graded (LG-) SiPMs, where the avalanche charge divides among multiple outputs in a ratio encoding the photon hit location. Standard linear reconstruction (center-of-gravity from summed channels) is superseded by calibration-informed or machine learning–based mapping; a fully connected deep neural network corrects systematic distortions by almost an order of magnitude, raising the number of resolved spatial regions ≥5.7× compared to linear reconstruction (e.g., from ∼529 to ≳6400 unique pixels in a 16×16 mm² LG-SiPM array) (Alispach et al., 2 Dec 2025).

Such approaches generalize to minimizing nonlinearities, border effects, and electrical crosstalk in large monolithic arrays, and can be deployed in camera FPGAs/ASICs for real-time imaging modalities such as SPECT and PET (Alispach et al., 2 Dec 2025).

6. Applications Across Scientific Domains

SiPM arrays have achieved maturity in multiple operational regimes:

Fieldable Gamma and Particle Detectors: Compact 2×2 arrays deliver PMT-grade energy resolution (6–8% at 662 keV), rapid gain stabilization, and robust PSD for neutron/γ separation in SPRDs, using NaI, CsI, or CLYC scintillators (Liang et al., 2016).
Astroparticle & Cherenkov Imaging: Large-area SiPM focal planes are deployed in dual-mirror telescopes (SCT/CTA) with up to 11,328 pixels; fast electronics enable sub-10 ns shower sampling, and high fill factor via TSV SiPM technology boosts angular performance for source localization (Otte et al., 2015, Mallamaci et al., 2018, Heller et al., 2021).
Cryogenic Noble-Liquid Experiments: Large arrays (100 cm², hundreds of dies) with integrated analog summing, temperature compensation, and ultra-low dark rate (<100 cps) replace PMTs in TPCs for dark matter and neutrino physics; metrics such as single-photon resolution <12% and DCR<2 Hz/mm² have been demonstrated at 77-87 K (Razeto et al., 2022, Peres, 2023, Wang et al., 2022, Catalanotti et al., 2015).
Neutrino Directionality and PSD: Segmented SiPM arrays enable multi-dimensional event reconstruction in segmented plastic detectors such as SANDD, achieving energy resolution ΔE/E ≃16% at Compton edge, PSD FOM >1, and z-resolution ≃1 cm (Li et al., 2019).
Orbital and High-Rate Systems: Scalable, bias-tunable, and flat-fielded SiPM arrays with FPGA/ASIC ring-buffered data architectures meet the integration and noise requirements of space-based UHECR photon detection (Painter et al., 2019).

Digital SiPMs and monolithic SPAD arrays with on-chip TDCs and per-pixel logic open new regimes for picosecond-level 4D-tracking in collider environments, offering ≃20 μm spatial and sub-50 ps time resolution (Feindt et al., 2024, Diehl et al., 2024).

7. Design Trade-Offs, Challenges, and Future Prospects

The scaling of SiPM arrays is constrained by:

Parasitic Capacitance and Bandwidth: Aggregate capacitance increases with parallel devices, degrading timing. Series–parallel topologies, transformer coupling, and wideband preamplifiers are necessary for arrays >1 cm² (Zhi et al., 2024, Razeto et al., 2022).
Temperature and Environmental Control: Stabilization of V_bd and bias to maintain uniform gain is non-trivial, especially over wide environmental or cryogenic ranges. Active compensation and robust sensor selection are required (Currás-Rivera et al., 4 Feb 2025, Stiegler et al., 2019).
Uniformity and Flatness: Ganged arrays must maintain <5% gain spread for optimal SNR, enforce mechanical tolerances at the sub-mm level, and, for monolithic or linearly-graded arrays, correct higher-order non-linearities via calibration or ML (Barbosa et al., 2011, Alispach et al., 2 Dec 2025).
Power and Readout Complexity: Large-channel-count arrays, particularly with monolithic or highly parallel summing, demand low-noise, low-power ASICs, efficient summing trees, and bandwidths up to O(10) GHz per array (Wang et al., 5 Feb 2025, Otte et al., 2015).
Correlated Noise: Optical crosstalk and afterpulsing increase with ΔV and device density, impacting low-light sensitivity. Cryogenic operation suppresses intrinsic DCR but can enhance afterpulsing (notably in certain FBK devices at <150 K) (Catalanotti et al., 2015, Currás-Rivera et al., 4 Feb 2025).
Fill Factor and Efficiency: Digital implementations' large dead area must be mitigated by advanced CMOS processing, microlens arrays, or coupling to external radiators (Feindt et al., 2024, Diehl et al., 2024).

Ongoing developments address per-pixel TDCs for digital SiPMs, higher fill-factors via reduced dead zone design, integrated temperature/bias feedback loops, compact summing ASICs, and ML-based real-time reconstruction techniques (Alispach et al., 2 Dec 2025, Diehl et al., 2024).

References

Key studies include "Scintillation detectors constructed with an optimized 2x2 silicon photomultiplier array" (Liang et al., 2016), "Design of a SiPM-based cluster for the Large Size Telescope camera of CTA" (Mallamaci et al., 2018), "The DESY Digital Silicon Photomultiplier: Device Characteristics and First Test-Beam Results" (Feindt et al., 2024), "Development of a mini-PET Detector based on Silicon Photomultiplier Arrays for Plant Imaging Applications" (Barbosa et al., 2011), and "Position-Sensitive Silicon Photomultiplier Array with Enhanced Position Reconstruction by means of a Deep Neural Network" (Alispach et al., 2 Dec 2025). Comprehensive surveys of readout architectures, scalability, and environmental dependence are provided in (Wang et al., 5 Feb 2025, Zhi et al., 2024, Currás-Rivera et al., 4 Feb 2025), and (Razeto et al., 2022). The application spectrum and ongoing R&D directions are further exemplified in (Heller et al., 2021, Peres, 2023, Li et al., 2019), and (Diehl et al., 2024).