Skyrmion Synapse: Nano Neuromorphic Device

Updated 11 January 2026

Skyrmion-based synapses are nanoscale devices utilizing topologically protected magnetic skyrmions for nonvolatile, multilevel synaptic weight storage.
They employ spin–orbit torque, VCMA, and DMI in multilayered structures to achieve sub-nanosecond operation and femtojoule-scale energy dissipation.
Their integration in crossbar architectures enables in-memory weighted sum operations, robust learning rules, and high-density neuromorphic systems.

A skyrmion-based synapse is a nanoscale artificial synaptic device that leverages the particle-like, topologically protected spin texture of magnetic skyrmions to encode, update, and read synaptic weights for neuromorphic computing. These devices utilize mechanisms such as spin–orbit torque (SOT), voltage-controlled magnetic anisotropy (VCMA), and Dzyaloshinskii–Moriya interaction (DMI) in multilayered ferromagnet/heavy-metal structures. Skyrmions serve as nonvolatile, discrete information carriers whose number or configuration directly maps to the synaptic conductance. Such synapses offer non-volatility, multilevel weight storage, ultra-fast (sub-nanosecond) operation, and potentially femtojoule-scale energy dissipation, enabling in-memory, high-density neuromorphic architectures (Gomes et al., 2023, Song et al., 2019, Lone et al., 2023, Das et al., 2022).

1. Device Physics and Material Platforms

Skyrmion-based synapses exploit the stability, small size, and electrical manipulability of magnetic skyrmions stabilized by interfacial DMI in heavy-metal/ferromagnet multilayers. The canonical material stacks include:

[Co(1.2 nm)/Al(3 nm)/Pt(3 nm)]₁₀ multilayers on Ta buffer for room temperature stability (PMA by AlOx; DMI at Pt/Co, Co/AlOx interfaces) (Gomes et al., 2023).
Pt/GdFeCo/MgO or Ta/IrMn/CoFeB/MgO structures enabling large θ_SH and PMA for SOT switching (Song et al., 2019, Lone et al., 2023).
Synthetic antiferromagnetic (SAF) bilayers (e.g., Pt/Co/Ru/Co) for canceling Magnus force, supporting straight skyrmion motion and high linearity (Das et al., 2022, Das et al., 2022).
Integration with piezoelectric substrates (PMN-PT) for voltage-controlled antiferromagnetic exchange (RKKY) modulation (Yu et al., 2019).

Skyrmion nucleation, translation, and detection rely on:

Current-induced SOT: Pulsed currents (J ~ 10¹⁰–10¹² A/m², τ ~ 0.05–100 ns) generate and move skyrmions (Gomes et al., 2023, Sosa et al., 7 Jan 2025).
VCMA: Gate voltages modulate PMA locally, tuning nucleation probability, skyrmion size, or energy barriers for weight programming (Gomes et al., 2023, Lone et al., 2023, Yu et al., 2019).
AHE or MTJ detection: Weight readout via anomalous Hall effect (ΔV per skyrmion, sub-μV sensitivity) or changes in MTJ resistance (TMR up to 200–280%) (Gomes et al., 2023, Lone et al., 2023, Yu et al., 2019).

2. Weight Encoding and Weighted Sum Operation

The encoding of synaptic weights is fundamentally tied to the discrete, stable number of skyrmions or the configuration of skyrmion lattices in a defined region:

Integer counting: Each skyrmion under a detector correlates linearly to a conductance increment (ΔG/unit), yielding multi-level weights with 3–6 bit (8–64 state) resolution (Lone et al., 2023, Gupta et al., 2024).
Weighted sum: For M input tracks, weighted addition is physically represented as:

$N_{\rm Sk,tot} = \sum_{i=1}^M w_i N_{{\rm pulse},i}$

where $w_i$ parameterizes the skyrmion nucleation efficiency per pulse at input $i$ (Gomes et al., 2023). The net skyrmion number in a common detection zone is read out as a voltage change ΔV or resistance step, constructing the neural weighted sum operation $S = \sum_i w_i x_i$ intrinsically in hardware.

Differential and crossbar integration: Signed weights and large-scale vector–matrix multiplication are implemented via differential pairs (for negative values) and conductance crossbars with row/column addressing, leveraging Kirchhoff’s law for analog current summation (Lone et al., 2023, Gupta et al., 2024).

3. Plasticity and Learning Rules

Skyrmion-based synapses natively support multiple forms of synaptic plasticity, critical for learning in artificial neural and spiking neural networks (SNNs):

Long-term potentiation/depression (LTP/LTD): Cumulative pulse-driven increment/decrement of skyrmion number in the synaptic region provides stable, bias-free weight storage (Gomes et al., 2023, Song et al., 2019, Gupta et al., 2024).
Short-term plasticity (STP): Transient modulation of skyrmion radii or energy landscape (via VCMA or barrier gating) yields rapid but reversible conductance change, enabling temporal filtering and adaptation (Huang et al., 2016, Lone et al., 2022).
Spike-timing-dependent plasticity (STDP): Precise pulse timing between pre- and post-synaptic events yields temporally asymmetric weight windows, with tunable time constants and amplitude, directly realizing Hebbian and anti-Hebbian rules (Huang et al., 2016, Khodzhaev et al., 2024).
Mixed plasticity: Superposition of long-term (density-driven) and short-term (VCMA-driven) mechanisms in a single device for adaptive, dynamic learning (Lone et al., 2022).

4. Experimental Demonstrations and Benchmarking

Experimental works (Gomes et al., 2023, Song et al., 2019, Lone et al., 2023) and simulation studies have established key performance metrics:

Device Stack/Geometry	# Levels	Energy (fJ/op)	Readout	Linear Error	Endurance
Co/AlOx/Pt multilayer track	>24	20, ↓0.1	AHE	<10%	>10¹³ cycles
GdFeCo/MgO Pt multilayer	24	<1	Hall	~1%	>10¹³
Ta/IrMn/CoFeB/MgO QNN cell	32–64	~0.5	MTJ	<3%	>10¹²
Bilayer/SAF AF-coupled	7–8	~4	MTJ	~1%	>10¹⁵
Circular bilayer (disk)	16–64	0.87	MTJ	<1%	>10⁵ cycles
PMN-PT/SAF VCMA	analog	0.3	MTJ	~10%	unlimited

Key results:

Weighted sum error in two-input proof-of-concept devices is ≤10% (Gomes et al., 2023).
Classification accuracy: Skyrmion QNNs/WNNs reach ≈87–90% on CIFAR-10 (Lone et al., 2023, Lone et al., 2022); SNNs using 3–6 bit devices achieve up to 98.6% on MNIST (Chen et al., 2020, Gupta et al., 2024).
Ultra-low energy per operation: down to ≪1 fJ with SOT/VCMA; thermal nucleation schemes can approach the 25 fJ/event level of biological synapses (Gomes et al., 2023, Gupta et al., 2024).
Fast update/read: Sub-nanosecond pulse durations and inference times.

5. Crossbar Architectures and Large-Scale Integration

Scalability is achieved via conductance crossbar arrays with row/column addressing:

Each input line launches current pulses in a magnetic track, with output detection zones (Hall or MTJ) at crosspoints (Gomes et al., 2023, Lone et al., 2023, Gupta et al., 2024).
Time/interleaved amplitude-multiplexing allows addressing and avoidance of sneak paths (using high-resistivity detection electrodes) (Gomes et al., 2023).
Signed weights utilize differential pairs and conductance offset subtraction in readout (Lone et al., 2023).
Fan-in is limited by skyrmion crowding; techniques include enlarging detector zones or spatial multiplexing, with >10⁶ synapses/mm² feasible with sub-100 nm tracks (Gomes et al., 2023).

Integration prospects:

CMOS-compatibility in back-end-of-line processes,
3D stacking and overlay with neuron circuits,
Ultra-high-density, in-memory computation with compact synapse cell area (e.g., 44F×14F in 32 nm node for skyrmion devices) (Song et al., 2019).

6. Device Challenges, Optimization, and Future Perspectives

Current challenges and optimizations include:

Deterministic, low-energy nucleation: Stochastic nucleation probability p(1) ≈ 0.6; needs improvement for error-free multi-bit operation (Gomes et al., 2023).
Device variability: Notch geometry, film inhomogeneity, skyrmion–skyrmion interactions in high-density devices impact error margins; engineering compensated ferrimagnets and defect reduction are promising (Song et al., 2019).
Signal margin: Limited on/off ratio (2–3) compared to RRAM/PCM can affect noise tolerance, requiring sensitive readout or error-correcting logic (Lone et al., 2023, Sosa et al., 7 Jan 2025).
Thermal retention: Topological stability confers long lifetimes, but small skyrmions need high DMI and PMA for RT stability in dense layouts (Chen et al., 2020, Yu et al., 2019).
Eliminating the skyrmion Hall effect for deterministic transport: SAF bilayers ensure zero net Magnus force and straight motion at high current densities (Das et al., 2022, Das et al., 2022).
Energy scaling: Voltage-driven (VCMA, piezoelectric-tunable RKKY) schemes can push energy per update below 1 fJ (Yu et al., 2019, Gupta et al., 2024).
Endurance: No wear-out from ionic motion or filament formation; simulated/measured >10¹²–10¹⁵ cycles at constant performance.

Outlook:

Skyrmion-based synapses combine in-memory vector–matrix operations, dense analog or quantized weights, and ultra-low power with unique features such as non-volatility and topological protection.
Engineering challenges center on deterministic multi-skyrmion manipulation, miniaturization to sub-50 nm tracks, uniform device fabrication, and robust hybrid CMOS co-integration.
These synapses are positioned for use in hybrid SNN/ANN accelerators, edge AI, deep neuromorphic cores, and multi-level quantized neural hardware (Gomes et al., 2023, Lone et al., 2023, Gupta et al., 2024).

7. Representative Operation Modes and System Applications

Skyrmion-based synapses have demonstrated or modeled:

Biologically inspired STDP learning windows (Δw(Δt) = A_{±} exp(−|Δt|/τ_{±})), plastic weight evolution per pre–post spike delay (Huang et al., 2016, Khodzhaev et al., 2024).
Multi-level state interpolation in QNN and DNN inference, showing <2% accuracy drop compared to ideal software inference in large-scale CNN tasks (Lone et al., 2023, Gupta et al., 2024).
Mixed LTP and STP for static image classification and real-time dynamic pattern adaptation (Lone et al., 2022).
All-skyrmion SNNs with spike encoding, routing, and neuron firing implemented entirely by skyrmion transport, yielding ≈1 fJ/event and accuracy loss of only 4.4% versus full-precision synapses (He et al., 2017).
In-memory and crossbar computing compatible with high-speed, low-power neuromorphic system-level integration, including convolutional, pooling, and activation functionalities (Gupta et al., 2024).

Benchmarked device performance substantiates the promise of skyrmion-based synapses as scalable, energy-efficient, multi-level, and robust functional building blocks for next-generation electronic neuromorphic hardware.

References:

(Gomes et al., 2023, Song et al., 2019, Lone et al., 2023, Das et al., 2022, Das et al., 2022, Huang et al., 2016, Chen et al., 2020, Gupta et al., 2024, Yu et al., 2019, Sosa et al., 7 Jan 2025, Khodzhaev et al., 2024, Lone et al., 2022, He et al., 2017)