Spin-Caloritronic Devices Overview

• Spin-caloritronic devices are solid-state systems that couple spin, charge, and heat transport to enable energy harvesting and thermal management in nanostructures.
• They exploit phenomena like the spin Seebeck, spin Peltier, and anomalous Nernst effects through engineered interfaces and tailored material properties.
• These devices hold promise for on-chip cooling, waste-heat recovery, and reconfigurable spin logic, although efficiency remains a key challenge.

Spin‐caloritronic devices are solid-state platforms that exploit the coupled transport of spin, charge, and heat in nanostructures, leveraging spin-dependent thermoelectric phenomena for power generation, thermal management, and novel logic functionalities. By harnessing the flow of spin angular momentum in response to thermal gradients—or, conversely, utilizing spin or charge currents to control heat—the field expands the classical thermoelectric paradigm to encompass spintronic functionality. Spin-caloritronic devices realize effects such as the spin Seebeck effect, spin-dependent Peltier and Nernst effects, and their reciprocal relations via engineered interfaces, materials, and nanoscale architectures, with emergent opportunities in on-chip power harvesting and active thermal control in magnetic nanodevices.

1. Spin-Caloritronic Effects: Physical Principles

Fundamental spin-caloritronic effects originate in the interplay between spin, charge, and heat currents under non-equilibrium conditions in magnetic materials:

• Spin Seebeck effect (SSE): A temperature gradient in a magnetic insulator or conductor generates a spin current, which can be converted into a measurable electric voltage via the inverse spin Hall effect (ISHE) in an adjacent heavy metal (e.g., Pt). In a ferromagnetic insulator, long-wavelength magnon excitations carry pure spin currents in the absence of charge flow. The interfacial spin current density at the FI|N boundary is given by

$j_s = L_s\,\Delta T_m - \frac{G_s}{2e}\mu_s,$

where $L_s$ is the interfacial spin Seebeck coefficient (proportional to the real part of the interface spin-mixing conductance $G_r$), $\Delta T_m$ the magnon temperature difference, and $\mu_s$ the spin accumulation in the normal metal (Cahaya et al., 2015).

• Spin Peltier effect (SPE): The Onsager reciprocal of the SSE: injection of a spin current (by means such as the spin Hall effect) into a ferromagnet pumps heat, generating a temperature bias (Bauer, 2011). The spin Peltier coefficient $\Pi_s$ is related to the spin Seebeck coefficient $S_s$ by $\Pi_s = T S_s$.
• Two-current model: In metallic ferromagnets, the charge and spin sectors are coupled:

$$J_\uparrow = -\sigma_\uparrow[\nabla V + S_\uparrow \nabla T],\quad J_\downarrow = -\sigma_\downarrow[\nabla V + S_\downarrow \nabla T],$$

leading to coupled charge ($J_c$) and spin ($J_s$) currents and spin-dependent thermopower (Cahaya et al., 2015).

• Anomalous Nernst effect (ANE): In ferromagnets, a transverse electric field is generated perpendicular to both the magnetization $\vec{M}$ and $\nabla T$, with $E_\mathrm{ANE} = N(\vec{M}\times\nabla T)$ (Weiler et al., 2011).
• Coupled Onsager relations: The full thermoelectric response is described by a matrix relating $J_c$, $J_s$, and $J_q$ to the corresponding affinities (potential gradients and $\nabla T/T$), with symmetry relations enforcing Onsager reciprocity (Zhuo et al., 2016).

2. Device Architectures and Materials Platforms

Spin-caloritronic devices employ specific geometries and materials combinations to optimize conversion efficiency and functional performance:

• Longitudinal SSE/ISHE (bilayer): A magnetic insulator (e.g., YIG) is coated with a heavy metal (Pt); $\nabla T$ normal to the interface pumps a magnon-driven spin current, which is transformed into a transverse voltage by ISHE. Power output scales with device area, and performance is set by spin Hall angle $\theta_\mathrm{SH}$, spin-mixing conductance $G_s$, and interface Kapitza resistance $R_K$ (Cahaya et al., 2015, Cahaya et al., 2013).
• Spin Seebeck spin-valve: A lateral geometry with an FI|N base and two antiparallel ferromagnetic contacts. The SSE-induced spin accumulation in N drives a charge current through the valve via the GMR effect. The voltage output is scale-invariant (depends on polarization, not device area), enabling integration into nano-power sources (Cahaya et al., 2015, Cahaya et al., 2013).
• Flexible and nanostructured materials: Nanostructure engineering, such as Cu nanocluster formation in amorphous Fe-based ribbons, produces giant transverse thermoelectric response via ANE, yielding power factors and figures of merit competitive with top-performing crystalline magnets (Gautam et al., 2023).
• 2D and molecular platforms: Exfoliated van der Waals magnets (e.g., CrBr$_3$) can be integrated with Pt contacts via hBN encapsulation for finite-temperature SSE and pANE detection (Liu et al., 2020); quantum dot intermediates allow transistor-like electrical gating of spin-Seebeck current in metal–quantum dot–magnetic insulator junctions (Gu et al., 2016).

3. Device Performance: Efficiency, Figure of Merit, and Scaling

The thermoelectric efficiency and conversion performance are set by device-dependent figures of merit, generally expressed as

$$ZT = \frac{S_\mathrm{eff}^2\,G_c\,T}{K_\mathrm{eff}},$$

where $S_\mathrm{eff}$ is the net Seebeck coefficient, $G_c$ the effective conductance, $K_\mathrm{eff}$ the total thermal conductance, and $T$ temperature (Cahaya et al., 2015). The maximum efficiency is given by

$$\eta_\mathrm{max} = \eta_C\,\frac{\sqrt{1+ZT}-1}{\sqrt{1+ZT}+1},$$

with $\eta_C = \Delta T / T$ the Carnot efficiency.

Key metrics:

Device/Class	Typical $ZT$	Output Voltage	Area Scaling	Integration Target
SSE+ISHE	$\sim10^{-4}$	$\propto l$	Power $\propto$ area	Large-area, scalable
SSE+spin valve	$0.1-1$	Scale-invariant	Power $\propto$ num. of elements	Nano, on-chip sources
Flexible ANE (Cu clusters)	$2.2\times 10^{-4}$	Large $S_\mathrm{ANE}$	Rollable, conformal	Wearable, surface-mount
Quantum-dot SSE	Resonant enhanced	Tunable via gate	--	Spin-caloritronic transistors

While traditional thermoelectrics reach $ZT\sim 1-2$, spin-caloritronic platforms are currently limited by interface conductance and conversion parameters (e.g., $\theta_\mathrm{SH}$), but offer alternative scaling and integration advantages (Cahaya et al., 2015, Cahaya et al., 2013, Gautam et al., 2023).

4. Device Engineering: Interface and Material Control

Optimization of spin-caloritronic device performance is fundamentally determined by the engineering of interfaces and materials:

• Spin-mixing conductance ($G_s$): Atomically clean, sharp FI|N interfaces are critical; raising $G_s$ directly boosts both spin current injection and energy conversion (Cahaya et al., 2015, Cahaya et al., 2013).
• Kapitza resistance ($R_K$): Parasitic heat flow through interfaces must be minimized to maintain a sufficient thermal gradient driving the SSE (Cahaya et al., 2015).
• Spin Hall angle ($\theta_\mathrm{SH}$): Choice of heavy-metal contact (Pt, Ta, W) with large $\theta_\mathrm{SH}$ enhances voltage readout (Cahaya et al., 2015, Bauer, 2011).
• Magnetic material properties: High spin polarization ($P\sim 0.8-1$) via Heusler alloys, half-metals, or topological insulators increases $ZT$ in spin-valve-based devices (Cahaya et al., 2015, Cahaya et al., 2013).
• Nanostructuring: A nanostructure-engineering approach (e.g., Cu-clustering) enhances ANE by maximizing spin-orbit coupled interfaces without compromising mechanical flexibility (Gautam et al., 2023).
• Multilayer and superlattice design: Stacking of FI|N bilayers or multilayer repeats can increase spin-Seebeck voltage output via constructive interference of spin currents (Cahaya et al., 2015).

5. Key Applications and Functionality

Spin-caloritronic devices support a range of advanced functionalities beyond conventional thermoelectric modules:

• Waste-heat harvesting: SSE and ANE architectures allow for planar or large-area deployment for low-grade waste heat conversion in microelectronics (Cahaya et al., 2015, Bauer, 2011).
• On-chip cooling and logic: Spin-valve and SPE-based structures are promising for on-chip thermal management and reconfigurable logic elements that exploit thermally induced spin torques and domain evolution (Cahaya et al., 2015, Weiler et al., 2011, Uchida et al., 2021).
• Microwave/magnonic signaling: Spin-caloritronic nano-oscillators convert ohmic heating into coherent GHz magnetization precession and microwave emission, enabling self-powered magnonic circuits (Safranski et al., 2016).
• Thermal imaging and domain detection: Local thermal gradients (laser or micro-heater induced) used in ANE or SSE sensing can electrically image magnetic domain textures or skyrmions in both conductors and insulators (Weiler et al., 2011).

6. Challenges, Limitations, and Prospects

The field faces several technical challenges:

• Low ZT in current SSE/ISHE devices: ISHE-based generators (YIG|Pt) are constrained by small $\theta_\mathrm{SH}$ and spin-diffusion lengths, limiting $ZT$ to $<10^{-3}$. Spin-valve geometries can approach $ZT\sim0.1-1$ but require advanced patterning and metallic interface optimization (Cahaya et al., 2015, Cahaya et al., 2013).
• Thermal management: Minimization of parasitic heat conduction through metallic and magnetic films, and the localization of $\Delta T$ across active regions, is critical (Cahaya et al., 2015).
• Magnon-phonon decoupling: Accurately modeling and exploiting magnon-phonon non-equilibrium (two-temperature models) will allow improved quantitative predictions and inform device engineering (Cahaya et al., 2015).
• Phonon engineering: Suppression of lattice-mediated thermal conductivity (by scaffolding or multilayer design) can boost $ZT$ analogously to phonon-glass electron-crystal paradigms (Gautam et al., 2023, Cahaya et al., 2015).
• Integration with CMOS and spin memory: Development of spin-caloritronic memory architectures (e.g., SSE-assisted MRAM) and their integration with silicon-based processing remains ongoing (Cahaya et al., 2015, Uchida et al., 2021).
• Material discovery and informatics: High-throughput synthesis (sputtering, annealing) and machine learning-guided screening of alloys (for optimized $S_\mathrm{ANE}$, $\theta_\mathrm{SH}$, $P$) represent forward strategies (Gautam et al., 2023, Uchida et al., 2021).

7. Future Directions

Prospective advancements encompass:

• Device miniaturization: Spin-caloritronic transistors (utilizing quantum dots or molecular elements) allow for active gating of spin and heat flow at the few-nanometer scale (Gu et al., 2016).
• Exploiting low-dimensional and correlated systems: Hexagonal graphene nanoflakes with edge magnetism, van der Waals 2D ferromagnets, and geometrically frustrated ladders enable large, tunable spin Seebeck effects and $ZT_{\rm spin} > ZT_{\rm charge}$ regimes (Phùng et al., 2020, Bhattacharya et al., 16 Dec 2025, Liu et al., 2020).
• Multimodal cooperative effects: Devices designed to exploit constructive Onsager coupling between spin and charge can significantly enhance thermoelectric efficiency and cooling performance (cooperative spin caloritronics framework) (Zhuo et al., 2016).
• Ultrafast and nonlinear operation: Exploration of nonlinear thermomagnonic drag, THz and optical pumping for ultrafast spin and heat control (Uchida et al., 2021).

Spin-caloritronic devices lie at the intersection of thermoelectricity, spintronics, and nanoscience, with a continually expanding landscape of materials, architectures, and applications (Cahaya et al., 2015, Bauer, 2011, Gautam et al., 2023, Uchida et al., 2021).