Topological Field-Effect Memristors

• Topological field-effect memristors are reconfigurable, non-volatile devices that exploit band topology and electric-field control to modulate resistance states.
• They employ mechanisms like ferroelectric polarization and floating-gate charge trapping in platforms such as (TaSe₄)₂I and InAs/GaInSb quantum wells to achieve quantized switching.
• These devices demonstrate high on/off ratios, fast switching times, and potential integration into hybrid quantum and neuromorphic systems.

A topological field-effect memristor is a non-volatile, reconfigurable electronic element wherein the memory functionality and resistive switching arise from the interplay of band topology and an electric-field-controlled internal state, such as ferroelectric polarization or charge accumulation. Distinct from conventional memristors, these devices exploit the quantum-geometry of topological materials to engineer new switching mechanisms and enable robust operation regimes, often characterized by quantized or highly coherent electronic transport. This article details the physical principles, device architectures, field-effect control mechanisms, experimental metrics, and prospective application spaces of topological field-effect memristors, citing two principal experimental realizations: a ferroelectric memristor based on charge-density-wave (CDW) topological semimetal (TaSe₄)₂I (Ma et al., 2024), and a floating-gate memristor based on quantum spin Hall (QSH) InAs/GaInSb/InAs trilayer quantum wells (Meyer et al., 21 Nov 2025).

1. Band Topology and Materials Platforms

Topological field-effect memristors originate from material systems wherein the electronic band structure is characterized by nontrivial topological invariants—typically supporting robust boundary states decoupled from the bulk. Two archetypal material platforms have been successfully employed:

• (TaSe₄)₂I (CDW Topological Semimetal): Exhibits a body-centered tetragonal structure (I4₂2) with quasi-1D TaSe₄ chains separated by linear I–I “strands.” First-principles calculations and ARPES measurements confirm Dirac/Weyl-like crossings along Z–T–Z, yielding 24 pairs of Weyl points in the undistorted bulk (Ma et al., 2024).
• InAs/GaInSb/InAs QSH Trilayer Quantum Wells: Molecular-beam-epitaxy-grown trilayers tuned to the inverted regime, giving rise to a 2D topological insulator characterized by the Bernevig–Hughes–Zhang (BHZ) Hamiltonian and protected helical edge states (Meyer et al., 21 Nov 2025).

Both systems undergo additional symmetry-breaking phenomena—the CDW in (TaSe₄)₂I opens an electronic gap below $T_\mathrm{CDW} \approx 263$ K, rendering the bulk insulating at low temperature while confining topological surface states. In the QSH trilayer, band inversion produces a topological gap $\Delta \approx 27$ meV, with the phase diagram controlled by quantum well composition and thickness.

2. Internal State Variables and Field-Effect Control

The essential operational feature of a topological field-effect memristor is the field-tunable, non-volatile state variable that modulates device resistance via interaction with topologically nontrivial electronic states:

• Ferroelectric Polarization in (TaSe₄)₂I: Out-of-plane polarization $P$ arises from surface reconstruction—a buckled I layer breaks inversion symmetry, yielding a robust surface dipole $|p| \approx 0.098 \; e\,\text{Å}$ per cell, with switching barrier $\Delta E \approx 68$ meV/I-atom (Ma et al., 2024). Piezoresponse force microscopy reveals a clear $180^\circ$ phase flip with no in-plane component.
  • Polarization is switchable by electric field exceeding coercive field $E_c \approx 5.6$–$12.2$ MV/m, enabling two distinct device states (HRS/LRS).
• Floating Gate Charge in InAs/GaInSb QSH Devices: Deep charge trapping centers at the semiconductor–oxide interface function as an intrinsic floating gate. The total trapped charge $Q_f$ modifies the effective gate voltage $V_{\mathrm{eff}}$, enabling memory of applied bias history (Meyer et al., 21 Nov 2025).

These mechanism are non-volatile, non-destructive, and directly coupled to the field-effect at the channel or contact interface, offering memory without explicit physical migration of ions or atoms.

3. Device Structure and Electrical Operation

Device Architectures

Platform	Structure (active region)	Contact Geometry	State Control
(TaSe₄)₂I	Nanoribbons (100–300 nm thick)	Five electrodes (one active, four gnd)	E-field via Schottky
InAs/GaInSb QSH	TQW, $W=20\;\mu$m, $L=10\;\mu$m	Six-terminal Hall bar	Floating-gate bias

• (TaSe₄)₂I Devices: The multi-terminal grounding design—four grounded, one active electrode—breaks source/drain symmetry. Only a single Schottky contact is exposed to a switching field above $E_c$, ensuring non-volatile switching at a localized interface. Two-terminal geometries do not support memristive operation, as both contacts would switch synchronously and nullify hysteresis (Ma et al., 2024).
• InAs/GaInSb QSH Devices: The floating gate is actuated by shorting the top gate to the drain, so that the conductance state tracks $Q_f(t)$, itself set by history-dependent charge trapping during bias sweeps (Meyer et al., 21 Nov 2025).

Field-Effect Switching Mechanisms

• Barrier Modulation via Ferroelectric P in (TaSe₄)₂I: The polarization-controlled band bending at the metal–semimetal Schottky junction modulates barrier height:

$$\varphi_b = \varphi_0 \pm \Delta\varphi(P), \quad \Delta\varphi(P) \approx \frac{P}{\epsilon_0}$$

Reversal of $P$ switches barrier height and thereby the resistance state (LRS/HRS).

• Floating-Gate Effect in QSH Devices: Effective gate voltage is history-dependent:

$$Q_f(t) = \int_0^t I_{\rm trap}(t')\, dt', \quad V_\mathrm{eff}(t) = V_\mathrm{bias}(t) - \frac{Q_f(t)}{C_\mathrm{eff}}$$

so that channel conductance

$$G(V_\mathrm{eff}) = G_{\rm bulk}[V_\mathrm{eff}] + G_{\rm edge}[V_\mathrm{eff}]$$

and thus the current/voltage state is explicitly memristive:

$$M(q) = \frac{d\phi}{dq} = [G(V_\mathrm{eff}(q))]^{-1}$$

4. Transport Regimes: Topological vs. Bulk States

Topological field-effect memristors incorporate switching between regimes governed by either coherent, topologically protected edge-state transport or incoherent bulk conduction:

• (TaSe₄)₂I: The CDW gap suppresses bulk conduction at low temperature, isolating topological surface states. Ferroelectric polarization at the surface modifies the Schottky barrier at a single contact, toggling between high and low conductivity. I–V hysteresis with SET/RESET thresholds ($V_{\rm RESET} \approx +0.5$ V, $V_{\rm SET} \approx -0.3$ V) and on/off ratio $\gtrsim 10^3$ are observed (Ma et al., 2024).
• InAs/GaInSb QSH Devices: When $E_F$ lies in the topological gap, current flows via quantized helical edge channels ($R_\text{coh}=h/2e^2 \approx 12.9$ k$\Omega$ in short-channel devices); when $E_F$ is outside the gap, bulk (incoherent) conduction dominates ($R_\text{low}\lesssim 10$ k$\Omega$). Switching the floating-gate charge toggles between these transport channels, yielding an on/off ratio $R_\text{high}/R_\text{low} \sim 22.5$ (macroscale) (Meyer et al., 21 Nov 2025).

The existence of quantized, dissipationless channels in the resistive ON state distinguishes topological field-effect memristors from traditional oxide or filamentary types.

5. Memristor Characteristics and Performance Metrics

Key performance metrics in both systems are summarized as follows:

Metric	(TaSe₄)₂I (Ma et al., 2024)	InAs/GaInSb QSH (Meyer et al., 21 Nov 2025)
On/off ratio	$\gtrsim 10^3$	$\sim 22.5$ (macroscale), $\sim 6.4$ (quantized, micro)
SET/RESET volt.	$V_\text{SET} \approx -0.3$ V, $V_\text{RESET} \approx +0.5$ V	±10 V bias window
Endurance	$\geq 10^3$ cycles	$\sim 100$ cycles tested
Retention	$>10$ h stable	$>1$ h (in dark, cryogenic)
Switching time	$<1$ ms	Not reported explicitly

• Threshold and Reproducibility: Both systems exhibit low switching voltages and robust hysteresis. In (TaSe₄)₂I, device statistics (n=31) show V_SET~-0.3V, V_RESET~+0.5V, $R_{off}/R_{on}$ typically $\gtrsim 10^2$–$10^3$.
• Response Time and Multi-Level States: (TaSe₄)₂I supports both single-pulse and gradual (multipulse) switching with response times down to $\sim 0.7$ ms.
• Coherence and Quantization: In InAs/GaInSb devices, the HRS is protected by QSH edge states and can achieve quantized resistance, providing intrinsic fault tolerance.
• Efficiency: Estimated switching energy is on the order of a few picojoules per event in InAs/GaInSb QSH devices.

6. Interplay of Topology and Internal State: First-Principles Insights

The unique interplay between topology and the field-tunable internal state is central to device functionality:

• Topology–Ferroelectricity Coupling in (TaSe₄)₂I: First-principles calculations demonstrate that surface ferroelectric reconstruction gaps otherwise gapless (Weyl-derived) nodal points, opening partial bandgaps and evidencing a direct P↔band topology interaction (Ma et al., 2024). The energy landscape admits stable, switchable polarization within a shallow double-well.
• Topological Memory in QSH Devices: The floating-gate modulates whether current is shunted through the gapped bulk (open, incoherent conduction) or localized on helical edge channels (dissipationless, quantized, robust to disorder) (Meyer et al., 21 Nov 2025). Memory is encoded in an internal charge variable coupled to quantum boundary modes.

This coupling allows the use of quantum-geometry-derived states as active device elements directly programmable by classical electrical means.

7. Prospects for Hybrid Quantum--Neuromorphic Systems

Topological field-effect memristors support applications beyond conventional memory, notably at the intersection of quantum and neuromorphic hardware:

• Hybrid Quantum Architectures: Memristors based on QSH trilayer wells can serve as elements in topological crossbar arrays, where each junction acts as a memristive synapse with tunable, quantized edge transport.
• Reservoir Computing: The combination of dynamically adaptable floating gates and coherent edge-state circuits suggests architectures for topological reservoir computation based on the nonlinear interplay of memory and quantum transport.
• Room-Temperature Operation: (TaSe₄)₂I-based devices may be extended to higher temperatures through materials engineering (higher $T_\mathrm{CDW}$ compounds or surface terminations), with the potential for reconfigurable topological electronic interconnects.

A plausible implication is that the built-in resilience to disorder and quantization of transport in topological states confer intrinsic robustness, while field-programmable non-volatility enables adaptive circuit architectures (Ma et al., 2024, Meyer et al., 21 Nov 2025).

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Primary references:

• "Memristive switching in the surface of a charge-density-wave topological semimetal" (Ma et al., 2024)
• "A topological field-effect memristor" (Meyer et al., 21 Nov 2025)