Barrel Timing Layer (BTL) Overview
- Barrel Timing Layer (BTL) is a precision, barrel-shaped timing detector that provides sub-100 ps measurements for vertexing and particle identification in high-luminosity colliders.
- It employs advanced sensor technologies such as LYSO:Ce/SiPM for CMS and fast CMOS MAPS for Belle II, achieving time resolutions as low as 25 ps under high radiation.
- The design mitigates event pileup and optimizes vertex association, significantly enhancing physics analyses through improved particle ID and efficient signal recovery.
The Barrel Timing Layer (BTL) designates large-area precision timing detectors implemented as barrel-shaped layers around collider interaction regions to provide sub-100 ps time-of-arrival measurements for minimum-ionizing particles (MIPs). BTLs are central to both event pileup mitigation and time-of-flight-based particle identification (PID) in modern high-luminosity collider experiments. The leading implementations are the CMS BTL—part of the MIP Timing Detector (MTD) upgrade for the HL-LHC—and the STOPGAP BTL, a proposed upgrade to the Belle II experiment. While their mechanical contexts and system-level roles differ, both exemplify the frontier of precision timing in high-rate, high-radiation particle physics environments.
1. Functional Role and System Integration
The BTL in CMS, planned for HL-LHC operation, is a 38–40 m² cylindrical layer mounted at a radial position of approximately 1.15–1.17 m, between the outer silicon tracker and the electromagnetic calorimeter, covering (Dutta, 2018, Palluotto, 18 Jan 2026, Addesa et al., 15 Apr 2025). Its primary function is to deliver a per-track time resolution of 30–60 ps throughout the HL-LHC data taking, thereby reducing the spread of the collision time and enabling 4D vertexing, pileup mitigation, and new time-of-flight (TOF) searches for slow or long-lived particles. The BTL modules do not significantly increase the tracking material budget and are supported on a cold volume, sharing cooling infrastructure with the tracker (Palluotto, 18 Jan 2026, Dutta, 2018).
In Belle II, the Barrel Timing Layer ("STOPGAP") is proposed as a supplementary layer placed in the nominal gaps between the existing fused-silica Time-of-Propagation (TOP) bars. It is specifically designed to recover of nominally uncovered tracks, as well as reduce the additional degraded by edge effects, thus enhancing the overall barrel PID acceptance by (Hartbrich et al., 2022). The STOPGAP BTL is a compact, thin, modular system situated between the CDC outer shell and the inner face of the TOP enclosure, constrained to a radial space of about 45 mm.
2. Detector Module Architecture and Sensor Technology
CMS BTL:
The fundamental sensing element is a Lutetium-Yttrium Orthosilicate (LYSO:Ce) scintillator bar, typically , polished, optically isolated, and read out at both ends by SiPM arrays ("double-ended" configuration). Each module contains 16 bars, arranged into sensor modules (SMs), which are encapsulated with front-end electronics in a copper support housing ("Detector Module," DM). High-density arrays of SiPMs (microcell pitch 25 m) are matched to the bar ends and maintained at $T \approx -45\,^\circ$C with integrated TECs (Addesa et al., 2024, Addesa et al., 15 Apr 2025, Palluotto, 18 Jan 2026).
| Parameter | CMS BTL Value | Belle II STOPGAP BTL Value |
|---|---|---|
| Geometry | 38–40 m², | 1–3 m², 16 azimuthal sectors |
| Sensing | LYSO:Ce/SiPM | Fast CMOS MAPS (baseline) |
| Active Area | 331,776 channels (CMS) | – channels (STOPGAP) |
STOPGAP (Belle II BTL):
Each STOPGAP module employs two silicon-sensor layers (targeting monolithic CMOS MAPS in 65 nm HV-CMOS or BiCMOS processes). Pixel sizes range from up to depending on granularity requirements. The mechanical support is ultrathin (goal: mm active + mm support per layer), constructed with carbon-fiber frames and integrated microchannel cooling (Hartbrich et al., 2022).
Alternate sensor options evaluated for STOPGAP include:
- LGADs (Low-Gain Avalanche Diodes): Time resolution 20–30 ps, but requiring double layers for efficiency.
- LYSO+SiPM: Excellent timing (30 ps) but excessive material budget for this application.
3. Timing Performance, Readout, and Calibration
The BTL's core design objective is single-track, single-hit timing at or below 30 ps initially, and maintaining sub-60 ps through lifetime (bearing end-of-life radiation and dark-count rates).
CMS BTL:
- Test-beam results for the final module geometry demonstrate 25 ps (unirradiated) to 55 ps ( fluence, V = 1 V) per-bar time resolution (Addesa et al., 15 Apr 2025, Abbott et al., 2021, Addesa et al., 2024).
- The timing error is modeled as:
with main contributions from electronics noise, photon counting statistics, SiPM dark-count-induced jitter, and clock distribution (Addesa et al., 2024).
- SiPM dark-count rates rise up to 20 GHz after ; power and noise are kept within system budget using bias reduction and in-situ annealing at $+60\,^\circ$C (Addesa et al., 15 Apr 2025, Addesa et al., 2024).
Electronics (CMS):
- The TOFHIR2 ASIC provides per-channel preamplification, differential leading-edge discrimination (DLED), a three-threshold trigger, dual-ended analog buffering, and multi-level digitization (TAC, QAC, 10-bit ADC, on-chip TDC with 11 ps binning) (Albuquerque et al., 2024).
- Operational at up to 2.5 MHz/channel with no rate-dependent time resolution loss.
STOPGAP (Belle II):
- Targeting ps, achieved with monolithic CMOS MAPS using in-pixel amplifier/discriminator/TDC (bin 20–30 ps), power consumption (Hartbrich et al., 2022).
Calibration protocols in both design lines include per-channel time and amplitude correction (for time-walk), reference clock loop-back, and dedicated light-injection or minimum-ionizing-track scans. Quality assurance achieves ps across module positions (Addesa et al., 15 Apr 2025).
4. Radiation Tolerance and Thermal Management
CMS BTL:
- LYSO:Ce remains effectively radiation hard up to at $T < -30\,^\circ$C (Dutta, 2018, Addesa et al., 2024).
- SiPMs exhibit increasing dark count and degraded gain after irradiation, managed via cooling to $-45\,^\circ$C, operational overvoltage adjustments, and periodic annealing (Addesa et al., 2024, Addesa et al., 15 Apr 2025).
- The TOFHIR2 ASIC demonstrates resilience to total ionizing dose up to 7 Mrad, with all performance parameters returning to nominal after annealing cycles; single event upset rates at HL-LHC are mitigated with triple-modular redundancy (Albuquerque et al., 2024).
STOPGAP (Belle II):
- The expected non-ionizing energy loss is three orders of magnitude below MAPS and ASIC technology failure thresholds; radiation levels (, TID 0.16 kRad) are negligible compared to the MAPS qualification range (, Mrad) (Hartbrich et al., 2022).
Thermal control in both systems employs microchannel COâ‚‚ or ethanol circulation, with finite-element analysis (FEA) confirming sensor temperature variations (Hartbrich et al., 2022, Palluotto, 18 Jan 2026, Addesa et al., 15 Apr 2025).
5. Performance Impact and Physics Reach
CMS BTL:
- 30–60 ps timing reduces vertex merging rates from under 200-pileup conditions, cuts track-to-vertex misassociation by a factor of two, and substantially improves lepton/photon isolation, -tagging, and missing performance (Dutta, 2018, Palluotto, 18 Jan 2026).
- Enables time-of-flight separation of heavy states and sensitivity to long-lived particle signatures.
- Uniformity across the entire active volume is within 2 ps; spatial resolutions of a few millimeters along bars and sub-millimeter across bars are realized (Abbott et al., 2021).
- For the decay , the STOPGAP S/N=0.79 compared to S/N=0.37 for the original TOP system, more than doubling statistical power for hadronic-physics analyses at Belle II (Hartbrich et al., 2022).
STOPGAP (Belle II):
- Simulation of events shows up to GeV/c for kaons, with misID below 5% and full recovery of the problematic acceptance gaps (Hartbrich et al., 2022).
6. Optimization and Production Status
Broad R&D benchmarks SiPM cell sizes (15–30 m), crystal bar thicknesses (2.4–3.75 mm), and irradiation campaigns up to (Addesa et al., 2024). The CMS design has converged on 25 m pitch SiPMs with T1 (3.75 mm) bars as optimal, balancing photon detection efficiency, gain, and dark-count/power at both startup and end-of-life (Addesa et al., 2024). BTL modules are in full production, with over 50% assembled and system-level QA in progress (Palluotto, 18 Jan 2026).
Recommendations for further R&D on the STOPGAP BTL include a 3–5 year fast timing MAPS program in 65 nm HV-CMOS, system integration prototyping, and the development of on-chip TDC and sparsification logic (Hartbrich et al., 2022).
7. Future Prospects and Extensions
The BTL architecture is applicable beyond HL-LHC and Belle II. Emerging monolithic CMOS MAPS and hybrid SiPM/crystal solutions offer pathways to extend 4D tracking and trigger-level timing into future collider environments and heavy ion physics. STOPGAP's demonstration of ultra-thin, high-granularity timing modules within severe space constraints provides a blueprint for covering PID acceptance losses or adding TOF-based trigger legs in other systems (Hartbrich et al., 2022).
Advanced on-chip digital logic, multi-level analytical methods for timing, and continual irradiation resilience studies remain focal areas for future large-area fast-timing detectors in high-energy physics.