Microwave Linear Analog Computers (MiLACs)

• MiLACs are reconfigurable multiport microwave networks designed to implement arbitrary real-time linear transformations on analog signals.
• They utilize programmable admittance matrices to perform operations such as matrix–vector multiplication, inversion, and DFT without digital processing.
• MiLAC architectures enable low-latency, high-throughput applications like gigantic MIMO beamforming and real-time channel estimation while reducing hardware complexity.

A microwave linear analog computer (MiLAC) is a reconfigurable multiport microwave network engineered to implement arbitrary linear transformations on analog electromagnetic signals in the microwave (GHz) regime. By appropriately programming its internal tunable admittances, a MiLAC performs matrix–vector multiplication, inversion, and related linear-algebraic operations in real time, entirely in the analog domain. The MiLAC concept enables ultra-low-latency, high-throughput computation, particularly for applications such as large-scale signal processing, gigantic multiple-input multiple-output (MIMO) beamforming, channel estimation, and analog acceleration of linear system solvers, while minimizing RF-chain count, analog-to-digital/digital-to-analog converter (ADC/DAC) resolution, and computational complexity (Nerini et al., 10 Apr 2025, Tzarouchis et al., 2022, Nerini et al., 9 Apr 2025, Nerini et al., 18 Jun 2025, Wu et al., 15 Jan 2026).

1. Physical Modeling and Mathematical Principles

A MiLAC is represented as a P-port linear passive microwave network, characterized by its tunable port-admittance matrix $Y \in \mathbb{C}^{P \times P}$. Each port can accept input or output voltages (or currents), and all port pairs (and each port to ground) are interconnected via programmable admittance elements (e.g., varactors, MEMS, tunable reactances).

Given input voltages $u \in \mathbb{C}^{N \times 1}$ applied to $N$ input ports, the network equations yield the full set of port voltages $v \in \mathbb{C}^{P \times 1}$ via the relation: $v = [Y/Y_0 + I_P]^{-1} \tilde{u}$ where $Y_0$ is the reference admittance (typically corresponding to $Z_0 = 50~\Omega$), and $\tilde{u}$ is the vector zero-padded at the output ports.

Partitioning input and output ports, the network implements a generic linear transform $v_2 = H u$, where $H$ is determined by block inversion of the system matrix. By setting $Y$ appropriately, the MiLAC can realize arbitrary linear operators and their inverses, provided sufficient network dimension and tunability (Nerini et al., 9 Apr 2025, Nerini et al., 10 Apr 2025).

The internal admittance matrix $Y$ can be programmed for:

• Direct matrix–vector multiplication ($v_2 = K u$)
• Matrix inversion via feedback configurations ($v_2 = (I - K)^{-1} u$)
• Implementation of transformation kernels (DFT, LMMSE, ZF, etc.) (Tzarouchis et al., 2022, Nerini et al., 10 Apr 2025, Nerini et al., 9 Apr 2025)

2. MiLAC Hardware Architectures

MiLAC architectures have advanced from proof-of-concept metastructure-based core circuits to highly scalable, fully connected or graph-optimized microwave networks:

• Fully Connected MiLAC: Every port is interconnected to every other port and ground via tunable components; this topology enables the realization of any $P \times P$ admittance matrix and thus any linear transformation, but at quadratic component count $O(P^2)$ (Nerini et al., 10 Apr 2025, Nerini et al., 18 Jun 2025).
• Graph-Optimized MiLAC: Circuit complexity is reduced by restricting the network topology. Stem-connected (center-graph) MiLACs achieve capacity with only $O(N_SN_T)$ tunable elements, enabling practical scaling to gigantic MIMO (Nerini et al., 18 Jun 2025).
• Modular RF Meshes: Cascaded $2 \times 2$ reconfigurable RF analog processors (e.g., using quadrature hybrids and phase shifters) can be assembled into triangular/rectangular meshes to realize any $N \times N$ unitary transformation (Zhu et al., 2023).
• Metastructure and Cavity-Based Implementations: Programmable metasurfaces and chaotic microwave cavities provide an alternative approach for linear analog computation by exploiting programmable wavefront shaping and multiple scattering (Hougne et al., 2018).

All these implementations benefit from passive or low-power operation, reprogrammability, and mature fabrication methodologies in the microwave domain (Tzarouchis et al., 2022, Zhu et al., 2023).

3. MiLACs for Gigantic MIMO Beamforming

MiLACs allow beamforming—precoding at the transmitter and combining at the receiver—fully in the analog domain. The prominent workflow is as follows (Nerini et al., 10 Apr 2025, Nerini et al., 6 Jun 2025, Nerini et al., 18 Jun 2025, Wu et al., 15 Jan 2026):

• RF-chain minimization: Only $N_S$ RF chains (equal to the number of spatial streams) are required, regardless of antenna count $N_T, N_R$.
• Arbitrary linear transformation: The MiLAC is configured to implement the desired digital beamforming matrix or its optimal analog approximation.
• Processing capabilities: Natively supports ZF, regularized ZF, MMSE, and DFT with direct hardware realization of matrix–vector products and inversions.
• Capacity: In the single-user MIMO case, fully passive, lossless, and reciprocal MiLACs achieve the same MIMO channel capacity as ideal digital beamforming, provided the scattering matrix constraints are satisfied. Closed-form optimal solutions are available (Nerini et al., 6 Jun 2025, Nerini et al., 18 Jun 2025).
• Computational complexity: Per-symbol, MiLAC eliminates all digital multiplications; configuration is an $O(N_S N_T)$ or $O(N_S N_R)$ operation performed once per channel coherence block for (stem-connected) MiLAC (Nerini et al., 10 Apr 2025, Nerini et al., 18 Jun 2025).

Limitations in Multi-user MISO

In the general multi-user MISO downlink, a lossless reciprocal MiLAC cannot realize the entire set of digital beamformers due to its inherent unitarity and symmetry constraints. Only in the single-user or orthogonal-channel cases does MiLAC match the digital optimum; for generic user-channel configurations, there is a capacity gap, although it narrows as the number of antennas increases and channels approach mutual orthogonality (Fang et al., 5 Jan 2026, Wu et al., 15 Jan 2026).

4. Analog Channel Estimation and Signal Processing

MiLACs can execute sophisticated analog-domain signal processing tasks:

• Channel estimation: By carefully designing analog-domain training precoders and combiners, both LS and MMSE channel estimation can be performed fully in analog, attaining identical NMSE performance as digital methods, but eliminating matrix multiplications and drastically reducing real-time computation (Zhang et al., 16 Jan 2026).
• LMMSE estimators and Kalman filtering: By block programming of the MiLAC admittance matrix, one-shot analog computation of LMMSE estimators is possible. Kalman-filter architectures can split heavy linear steps to the MiLAC core, further reducing computational burden (Nerini et al., 9 Apr 2025).
• DFT and fixed matrix transformations: Any fixed linear transformation, such as the DFT, can be implemented in the network by a single (re)configuration, after which repeated analog transforms incur zero runtime computational cost (Nerini et al., 10 Apr 2025).

5. Performance, Complexity, and Practical Considerations

MiLACs offer significant reductions in computational and hardware complexity:

• Operational throughput: Analog computation occurs at the speed of microwave propagation (order of nanoseconds), with overall latency determined by network traversal and switching time.
• Complexity analysis: MI-LAC shifts computational cost to a one-time $O(N^2)$ (or lower, $O(N_S N_T)$, for stem-connected architectures) network programming step per coherence block, versus $O(N^3)$ digital complexity for matrix inversion or per-symbol $O(N_TN_S)$ multiplies for digital beamforming (Nerini et al., 10 Apr 2025, Nerini et al., 18 Jun 2025).
• Component count and scaling: Fully connected requires $O(P^2)$ tunable elements; stem-connected reduces this to $O(N_S N_T)$ or $O(N_S N_R)$, which is pivotal for MIMO arrays with $N > 10^3$ (Nerini et al., 18 Jun 2025).
• RF chain and converter reduction: Only the minimum number of RF chains are required, and low-resolution ADCs/DACs suffice since analog operations preserve per-stream isolation (Nerini et al., 6 Jun 2025, Zhang et al., 16 Jan 2026).
• Power and noise: Power consumption is dominated by tuning electronics and residual losses in passive components. Insertion loss, thermal noise, and component drift (e.g., due to temperature) must be controlled to maintain SNR and estimation fidelity (Tzarouchis et al., 2022, Nerini et al., 10 Apr 2025).
• Integration challenges: Precise calibration loops, high-speed switches/varactors, and controlled impedance layouts are crucial to achieving high dynamic range and stability. Potential paths include monolithic microwave ICs and metasurface integration for high port count (Nerini et al., 10 Apr 2025, Tzarouchis et al., 2022).

Performance Summary Table

Metric	Digital DSP	MiLAC (Fully Connected)	MiLAC (Stem-Connected)
Symbol-wise compute	O($N_TN_S$) mults	0 (analog)	0 (analog)
Matrix Inversion	O($N^3$)	O($N^2$) (config-time)	O($N_SN_T$) (config)
RF chains	$N_T$	$N_S$	$N_S$
Achievable Capacity	Yes	Yes (single-user MIMO)	Yes (single-user MIMO)
Circuit Complexity	---	$O(P^2)$	$O(N_SN_T)$

All entries are as found in cited papers. “Config-time” costs refer to pre-channel estimation or per coherence block.

6. Applications and Extensions

The MiLAC paradigm is applicable to:

• Communications: Massive/gigantic MIMO beamforming, near-sensor processing, channel estimation, and real-time adaptive filtering (Nerini et al., 6 Jun 2025, Fang et al., 5 Jan 2026).
• Signal processing: Parallel DFTs, filtering, large-scale matrix inversion, real-time solving of linear systems (Tzarouchis et al., 2022, Nerini et al., 9 Apr 2025).
• Machine learning accelerators: Near-sensor deep neural network layers using cascaded RF meshes, with demonstrated high-MNIST performance in 8×8 testbeds (Zhu et al., 2023).
• Sensing and imaging: Real-time tomographic inversion, radar, and array pre-processing. Cavity-based MiLAC concepts extend to parallel multi-frequency or multi-equation solvers (Camacho et al., 2020, Hougne et al., 2018).
• Optimization and control: Non-stationary iterative algorithms, including Newton’s method and Lagrange-multiplier-based inverse design (Tzarouchis et al., 2022).

MiLACs thus provide a general-purpose analog-accleration framework for linear algebraic computation across RF/microwave domains.

7. Limitations, Challenges, and Future Directions

MiLAC technology faces several open challenges:

• Performance bounds: In multi-user MISO, the constraint manifold of passive, reciprocal MiLACs restricts the set of realizable beamformers, resulting in a nonzero but diminishing sum-rate gap versus digital as channel dimension increases or as user channels approach orthogonality (Fang et al., 5 Jan 2026, Wu et al., 15 Jan 2026).
• Noise floor and precision: Device nonidealities, drift, and amplifier noise set an error floor ($\sim10^{-3}$ relative error) for large-scale MiLACs (Tzarouchis et al., 2022). Mixed-precision or hybrid digital–analog post-processing schemes are a plausible avenue for bridging accuracy limitations.
• Component scalability: The quadratic (or even linear) growth in tunable elements with $N$ remains a hardware engineering challenge for extreme-scale arrays. Advanced integration (RF-IC, monolithic packaging, metasurface approaches) and modular mesh decomposition are active areas of research (Zhu et al., 2023, Nerini et al., 18 Jun 2025).
• Frequency and bandwidth limitations: Current demonstrations are at MHz–GHz; extending to mmWave or THz requires fast, low-loss tunable elements and careful S-parameter matching (Tzarouchis et al., 2022).
• Reconfiguration speed: Channel-to-channel admittance update must be achievable within system latency constraints (sub-μs regime for wireless standards) (Nerini et al., 10 Apr 2025, Tzarouchis et al., 2022).

Potential directions include embedded on-chip analog accelerators, mixed-precision analog–digital co-processors, photonic extensions, and further optimization of low-complexity, high-port-count MiLACs for next-generation wireless and signal processing systems.