Receptor-Like Memristors for Neuromorphic Circuits
- Receptor-like memristors are nanoscale devices that emulate biological receptors by using voltage thresholds and state transitions to achieve analog memory retention and plasticity.
- They are fabricated using materials such as TiOx, NbOx, and hydrophobically gated nanopores, which enable both volatile and nonvolatile switching for dynamic signal processing.
- These devices provide high energy and bandwidth efficiency through intrinsic physical mechanisms for event encoding, supporting scalable, brain-inspired architectures.
A receptor-like memristor is a nanoscale electronic or iontronic device whose conductance dynamics emulate salient features of biological receptors or synapses, such as thresholded integration, analog or quantized memory retention, and volatility or history-dependent plasticity. Conceptually, these devices leverage intrinsic physical mechanisms—voltage thresholds, volatile or non-volatile state transitions, barrier-limited conduction, or electrowetting—to filter, compress, and encode transient events with energy and bandwidth efficiencies approaching those of natural neural tissue. Receptor-like memristors have been realized in a range of material systems, including TiOx and NbOx thin films and hydrophobically gated nanopores, and are central to modern approaches in neuromorphic hardware and brain-inspired information processing (Gupta et al., 2015, Berdan et al., 2015, Deswal et al., 2019, Paulo et al., 2023).
1. Device Architectures and State Variable Models
Receptor-like memristors are structured to maximize analog state resolution and event discrimination using intrinsic device physics. TiOx-based systems employ vertical stacks on Si/SiO₂ substrates, with a Pt/Ti bottom electrode, TiO₂₋ₓ (25 nm), and Pt top electrode; electron-gun evaporation, reactive sputtering, and lift-off define layer quality and dimensions. Electroforming (≥6.5 V sweep) induces a nonvolatile, low-resistance state essential for further analog switching (Gupta et al., 2015).
NbOx-based devices utilize amorphous Nb₂O₅ layers (≈30 nm) grown via reactive DC magnetron sputtering on Pt/SiO₂/Si, with square Nb top electrodes (80 nm thick) deposited either in UHV (interface-clean, analog switching) or low-vacuum (trap-rich, digital switching). Barrier-limited electronic conduction avoids filamentary degradation, leading to volatile modulation under pulsed stimuli (Deswal et al., 2019).
Hydrophobically gated memristive nanopores (HyMN) are fabricated as rigid sub-nm cylindrical pores in solid-state or protein-lipid membranes, with hydrophobic constrictions set by contact-angle tuning (θ₀>100° for synthetic, phenylalanine/aspartate rings for FraC protein mutants). These structures undergo electrowetting-induced state transitions between dry (non-conductive) and wet (conductive) configurations, mirroring the gating of ion channels in neural systems (Paulo et al., 2023).
State variable models typically encode internal parameters such as oxygen vacancy concentration, filament size, trap occupation, or water occupancy, which control device conductance:
(Gupta et al., 2015, Berdan et al., 2015), with volatility and restoration time constants added for synaptic-mimicry.
2. Thresholded and Analog I–V Characteristics
A defining feature of receptor-like memristors is the presence of voltage thresholds for state transitions. In TiOx devices, forming establishes SET and RESET voltages (~±3 V), with sharp dead-band regions (Vₜₕ⁺ ≈+1.45 V, Vₜₕ⁻ ≈−1.65 V) below which conductance change is negligible (Gupta et al., 2015). NbOx devices display bipolar hysteresis with ~100× ON/OFF ratio (I_ON ∼ 1 μA at +8 V, I_OFF ∼ 10 nA at –8 V) and analog, gradual conductance modulation; critical thresholding reflects interfacial Schottky barrier asymmetries (ϕ_B₁ ≈ 0.4 eV, ϕ_B₂ ≈ 1.75 eV) (Deswal et al., 2019).
In HyMNs, the gating voltage V_c sets the transition from dry to wet state, with conductance hysteresis arising from electrowetting. The rate equations for wetting/drying encode history-dependence and allow ensemble behavior to be modeled as
where n is wet pore fraction, and k_w, k_d are voltage-dependent rates. Characteristic ON/OFF ratios for these nanopores can exceed 10³, with retention times tunable from microseconds to seconds (Paulo et al., 2023).
3. Synaptic Plasticity and Short-Term Dynamics
Receptor-like memristors are engineered for both transient and lasting plasticity, capturing phenomena such as paired-pulse facilitation (PPF), post-tetanic potentiation (PTP), and spike-rate dependent plasticity (SRDP).
In TiOx memristors, sub-threshold pulses are summated via integrative dynamics until a meta-threshold is crossed, at which point a resistive state transition encodes the event (Gupta et al., 2015). Volatility (τ_vol ≈ 30–250 ms in TiO₂ systems) allows for rapid decay of transient conductance changes, emulating spiking facilitation and depression as quantified by Tsodyks–Markram parameters (U ≈ 0.3–0.5, τ_rec ≈ 600–800 ms, τ_fac ≈ 100–200 ms) (Berdan et al., 2015).
Nb₂O₅ devices display clear analog weight updates under pulse trains, with potentiation/depression fit by stretched exponentials. PPF indices reach ~30–40 nA difference at <5 s inter-pulse intervals, decaying with τ_f ≈ 2.1 s; metaplasticity is evident via deceleration of decay τ_r with increased pulse count (Deswal et al., 2019).
HyMNs realize synaptic learning/forgetting by sequential application of excitatory/inhibitory biases, with programmable conductance steps per pulse (ΔG(n)) and relaxation on τ_d (Paulo et al., 2023). This mode is consistent with receptor desensitization and ligand-gated channel kinetics.
4. Energy, Bandwidth, and Information Efficiency
One principal advantage of receptor-like memristors is on-device event encoding and data compression. TiOx arrays transduce spike amplitudes directly into nonvolatile resistive state changes, supporting compression ratios η up to 300× (e.g., 12.2 kHz raw sampled to 40 reads/s, each at 12 bits) (Gupta et al., 2015). The energy per event is 45 nJ for 100 μs pulses at 1.5 V, i.e., 2–3× lower than conventional spike detectors.
HyMNs operate at ≈1–10 pJ per switching event, matching the pJ-scale costs of synaptic transmission and outperforming nJ–μJ scale solid-state memristors in terms of energy efficiency and miniaturization (Paulo et al., 2023). Bandwidth reduction is achieved by infrequent state readouts (hundreds less frequent than raw sampling), multiplexed and time-division architectures (Gupta et al., 2015), with inherent spike selection via thresholded integration.
5. Interface Engineering: Digital versus Analog and Volatile versus Nonvolatile Modes
The character of memristive switching—digital/analog and volatile/nonvolatile—is sensitively controlled by interface properties and fabrication parameters. In Nb₂O₅ devices, UHV-deposited Nb electrodes favor trap-limited, volatile, analog conduction, whereas low-vacuum conditions induce formation of conductive filaments, resulting in digital, nonvolatile transitions and increased ON/OFF ratios (>10³) (Deswal et al., 2019). This interface-driven tunability is essential for optimizing neuromorphic memory arrays for specific architectural demands, such as transient signal preprocessing versus persistent storage.
TiO₂ systems exploit both nonvolatile amplitude encoding and volatile, metastable dynamics for spatio-temporal computation, with device variability mapped statistically to facilitate biological realism at the circuit level (Gupta et al., 2015, Berdan et al., 2015).
6. Comparison to Biological Receptors and Implications for Neuromorphic Systems
Receptor-like memristors parallel biological systems in threshold integration, plasticity, scalability, and energy use. TiOx and NbOx thresholds (±1.5–8 V after gain/offset) serve analogously to ion channel gating near –50 mV membrane potentials; integrative windows (τ_integration ≈ μs–ms) can be tuned to broadly match biological postsynaptic kinetics (τ_m ≈ 10–50 ms) (Gupta et al., 2015). Volatility and history-dependent decay times in memristors (τ_vol, τ_r) directly emulate receptor desensitization and facilitation/depression.
HyMNs, operating solely via bubble nucleation and electrowetting, replicate voltage-gated ion channel switching with μs–ms kinetics, pJ-level energy expenditure, and sub-nm device footprints; arrayed integration is plausible at micron-scale (Paulo et al., 2023).
A plausible implication is that these devices afford direct implementation of dendritic preprocessing, temporal filtering, coincidence detection, and spike-timing-dependent plasticity in large-scale neuromorphic platforms. The challenge lies in precise fabrication, stable integration, and circuit-level interface, especially for nanopore arrays in hybrid bioelectronic chips.
7. Scalability, Arrays, and System-Level Integration
TiOx memristive arrays have been demonstrated at 16×14 banks, interfaced to multi-transistor CMOS front ends; raw data rates and storage are reduced by 200–300× via on-node filtering (Gupta et al., 2015). Further extrapolation to ≥1024×1024 arrays is feasible with negligible die area penalty.
For NbOx and HyMN devices, scalable crossbar architectures leveraging interface-controlled analog/volatile switching or dense iontronic arrays are technically possible, though integration of hundreds to thousands of individually addressable synapses requires advanced multiplexing and stable membrane engineering (Deswal et al., 2019, Paulo et al., 2023). CMOS compatibility (biases ≤1.5 V) is maintained across all platforms.
Potential applications include reservoir computing, spatio-temporal sensory preprocessing, time-series prediction, and event-driven neuromorphic learning where device-level filtering and memory dynamics reduce processing burdens and enable compact, biophysically realistic architectures.