Detailed numerical benchmarking of larger code‑surgery gadgets

Develop detailed numerical simulations for the larger ancilla‑based code‑surgery gadgets described in Extended Data Table S5—particularly those measuring high‑weight logical operators on the LP processor code [[1122, 148, ≤20]] and the LP memory codes [[4350, 1224, ≤20]] and [[5278, 1480, ≤24]]—to quantify logical error rates under the circuit‑level depolarizing noise model and validate that their performance matches the observed behavior on the smaller gadget.

Background

The paper constructs and benchmarks representative surgery gadgets, showing fault‑tolerant performance for a small example. For larger gadgets needed to measure higher‑weight logical operators in the LP processor and memory codes, the authors infer expected behavior but do not present numerical results.

Completing detailed simulations for these larger gadgets would provide quantitative validation of logical error rates and confirm that the chosen surgery cycle length and ancilla designs achieve the intended fault‑tolerant performance at scale.

References

We expect similar behavior for the larger gadgets in Extended Data Table~\ref{tab:surgery}, and leave detailed simulations to future work.

— Shor's algorithm is possible with as few as 10,000 reconfigurable atomic qubits  (2603.28627 - Cain et al., 30 Mar 2026) in Appendix, Section “Surgery,” Subsection “Concrete construction and benchmarking”